2017-12-25 19:54:33 +00:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright 2008 Simtec Electronics
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// Copyright 2008 Simtec Electronics
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// Ben Dooks <ben@simtec.co.uk>
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// http://armlinux.simtec.co.uk/
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2008-10-21 13:06:50 +00:00
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2013-08-25 17:37:34 +00:00
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/*
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* NOTE: Code in this file is not used when booting with Device Tree support.
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*/
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2008-10-21 13:06:50 +00:00
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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2011-12-22 00:01:38 +00:00
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#include <linux/device.h>
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2008-10-21 13:06:50 +00:00
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#include <linux/serial_core.h>
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2014-02-14 01:32:45 +00:00
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#include <linux/serial_s3c.h>
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2008-10-21 13:06:50 +00:00
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#include <linux/platform_device.h>
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2013-08-25 17:37:34 +00:00
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#include <linux/of.h>
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2008-10-21 13:06:50 +00:00
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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2010-01-26 01:45:40 +00:00
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#include <mach/regs-clock.h>
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2008-10-21 13:06:50 +00:00
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#include <plat/cpu.h>
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#include <plat/devs.h>
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2008-10-31 16:14:38 +00:00
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#include <plat/sdhci.h>
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2010-06-09 09:55:19 +00:00
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#include <plat/adc-core.h>
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2008-10-31 16:15:00 +00:00
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#include <plat/iic-core.h>
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2011-12-22 22:27:42 +00:00
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2015-07-29 17:00:36 +00:00
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#include "ata-core.h"
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2011-12-22 22:27:42 +00:00
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#include "common.h"
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2015-07-29 17:00:47 +00:00
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#include "onenand-core.h"
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2008-10-21 13:06:50 +00:00
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void __init s3c6410_map_io(void)
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{
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2008-10-31 16:14:38 +00:00
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/* initialise device information early */
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s3c6410_default_sdhci0();
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2008-10-31 16:14:39 +00:00
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s3c6410_default_sdhci1();
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2009-11-23 12:34:46 +00:00
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s3c6410_default_sdhci2();
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2008-10-31 16:15:00 +00:00
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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s3c_i2c1_setname("s3c2440-i2c");
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2009-07-01 15:47:06 +00:00
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2010-06-09 09:55:19 +00:00
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s3c_adc_setname("s3c64xx-adc");
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2009-07-01 15:47:06 +00:00
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s3c_device_nand.name = "s3c6400-nand";
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2010-05-20 06:59:05 +00:00
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s3c_onenand_setname("s3c6410-onenand");
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s3c64xx_onenand1_setname("s3c6410-onenand");
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2010-06-08 07:55:45 +00:00
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s3c_cfcon_setname("s3c64xx-pata");
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2008-10-21 13:06:50 +00:00
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}
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2008-10-21 13:06:51 +00:00
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void __init s3c6410_init_irq(void)
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{
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/* VIC0 is missing IRQ7, VIC1 is fully populated. */
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s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
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}
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2011-12-22 00:01:38 +00:00
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struct bus_type s3c6410_subsys = {
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.name = "s3c6410-core",
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.dev_name = "s3c6410-core",
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2008-10-21 13:06:50 +00:00
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};
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2011-12-22 00:01:38 +00:00
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static struct device s3c6410_dev = {
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.bus = &s3c6410_subsys,
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2008-10-21 13:06:50 +00:00
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};
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static int __init s3c6410_core_init(void)
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{
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2013-08-25 17:37:34 +00:00
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/* Not applicable when using DT. */
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2015-02-27 19:31:51 +00:00
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if (of_have_populated_dt() || !soc_is_s3c64xx())
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2013-08-25 17:37:34 +00:00
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return 0;
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2011-12-22 00:01:38 +00:00
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return subsys_system_register(&s3c6410_subsys, NULL);
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2008-10-21 13:06:50 +00:00
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}
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core_initcall(s3c6410_core_init);
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int __init s3c6410_init(void)
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{
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printk("S3C6410: Initialising architecture\n");
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2011-12-22 00:01:38 +00:00
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return device_register(&s3c6410_dev);
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2008-10-21 13:06:50 +00:00
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}
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