2018-07-02 06:24:45 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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//
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// soc-topology.c -- ALSA SoC Topology
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//
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// Copyright (C) 2012 Texas Instruments Inc.
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// Copyright (C) 2015 Intel Corporation.
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//
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// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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// K, Mythri P <mythri.p.k@intel.com>
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// Prusty, Subhransu S <subhransu.s.prusty@intel.com>
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// B, Jayachandran <jayachandran.b@intel.com>
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// Abdullah, Omair M <omair.m.abdullah@intel.com>
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// Jin, Yao <yao.jin@intel.com>
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// Lin, Mengdong <mengdong.lin@intel.com>
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//
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// Add support to read audio firmware topology alongside firmware text. The
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// topology data can contain kcontrols, DAPM graphs, widgets, DAIs, DAI links,
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// equalizers, firmware, coefficients etc.
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//
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// This file only manages the core ALSA and ASoC components, all other bespoke
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// firmware topology data is passed to component drivers for bespoke handling.
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2015-05-29 18:06:14 +00:00
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/list.h>
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/soc-topology.h>
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2015-08-05 13:41:13 +00:00
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#include <sound/tlv.h>
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2015-05-29 18:06:14 +00:00
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2019-04-04 19:13:58 +00:00
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#define SOC_TPLG_MAGIC_BIG_ENDIAN 0x436F5341 /* ASoC in reverse */
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2015-05-29 18:06:14 +00:00
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/*
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* We make several passes over the data (since it wont necessarily be ordered)
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* and process objects in the following order. This guarantees the component
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* drivers will be ready with any vendor data before the mixers and DAPM objects
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* are loaded (that may make use of the vendor data).
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*/
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#define SOC_TPLG_PASS_MANIFEST 0
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#define SOC_TPLG_PASS_VENDOR 1
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2022-04-01 12:01:58 +00:00
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#define SOC_TPLG_PASS_CONTROL 2
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2015-05-29 18:06:14 +00:00
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#define SOC_TPLG_PASS_WIDGET 3
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2015-08-10 14:48:30 +00:00
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#define SOC_TPLG_PASS_PCM_DAI 4
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#define SOC_TPLG_PASS_GRAPH 5
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2023-01-27 23:11:02 +00:00
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#define SOC_TPLG_PASS_BE_DAI 6
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#define SOC_TPLG_PASS_LINK 7
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2015-05-29 18:06:14 +00:00
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#define SOC_TPLG_PASS_START SOC_TPLG_PASS_MANIFEST
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2016-11-02 17:04:27 +00:00
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#define SOC_TPLG_PASS_END SOC_TPLG_PASS_LINK
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2015-05-29 18:06:14 +00:00
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2016-10-11 06:36:42 +00:00
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/* topology context */
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2015-05-29 18:06:14 +00:00
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struct soc_tplg {
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const struct firmware *fw;
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/* runtime FW parsing */
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2022-01-06 09:28:47 +00:00
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const u8 *pos; /* read position */
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2015-05-29 18:06:14 +00:00
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const u8 *hdr_pos; /* header position */
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unsigned int pass; /* pass number */
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/* component caller */
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struct device *dev;
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struct snd_soc_component *comp;
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u32 index; /* current block index */
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2015-08-18 10:11:51 +00:00
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/* vendor specific kcontrol operations */
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2015-05-29 18:06:14 +00:00
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const struct snd_soc_tplg_kcontrol_ops *io_ops;
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int io_ops_count;
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2015-08-18 10:12:20 +00:00
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/* vendor specific bytes ext handlers, for TLV bytes controls */
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const struct snd_soc_tplg_bytes_ext_ops *bytes_ext_ops;
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int bytes_ext_ops_count;
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2015-05-29 18:06:14 +00:00
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/* optional fw loading callbacks to component drivers */
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struct snd_soc_tplg_ops *ops;
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};
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/* check we dont overflow the data for this control chunk */
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static int soc_tplg_check_elem_count(struct soc_tplg *tplg, size_t elem_size,
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unsigned int count, size_t bytes, const char *elem_type)
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{
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const u8 *end = tplg->pos + elem_size * count;
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if (end > tplg->fw->data + tplg->fw->size) {
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dev_err(tplg->dev, "ASoC: %s overflow end of data\n",
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elem_type);
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return -EINVAL;
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}
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/* check there is enough room in chunk for control.
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extra bytes at the end of control are for vendor data here */
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if (elem_size * count > bytes) {
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dev_err(tplg->dev,
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"ASoC: %s count %d of size %zu is bigger than chunk %zu\n",
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elem_type, count, elem_size, bytes);
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return -EINVAL;
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}
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return 0;
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}
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2022-04-01 12:01:57 +00:00
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static inline bool soc_tplg_is_eof(struct soc_tplg *tplg)
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2015-05-29 18:06:14 +00:00
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{
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const u8 *end = tplg->hdr_pos;
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if (end >= tplg->fw->data + tplg->fw->size)
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2022-04-01 12:01:57 +00:00
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return true;
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return false;
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2015-05-29 18:06:14 +00:00
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}
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static inline unsigned long soc_tplg_get_hdr_offset(struct soc_tplg *tplg)
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{
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return (unsigned long)(tplg->hdr_pos - tplg->fw->data);
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}
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static inline unsigned long soc_tplg_get_offset(struct soc_tplg *tplg)
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{
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return (unsigned long)(tplg->pos - tplg->fw->data);
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}
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/* mapping of Kcontrol types and associated operations. */
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static const struct snd_soc_tplg_kcontrol_ops io_ops[] = {
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{SND_SOC_TPLG_CTL_VOLSW, snd_soc_get_volsw,
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snd_soc_put_volsw, snd_soc_info_volsw},
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{SND_SOC_TPLG_CTL_VOLSW_SX, snd_soc_get_volsw_sx,
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snd_soc_put_volsw_sx, NULL},
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{SND_SOC_TPLG_CTL_ENUM, snd_soc_get_enum_double,
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snd_soc_put_enum_double, snd_soc_info_enum_double},
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{SND_SOC_TPLG_CTL_ENUM_VALUE, snd_soc_get_enum_double,
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snd_soc_put_enum_double, NULL},
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{SND_SOC_TPLG_CTL_BYTES, snd_soc_bytes_get,
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snd_soc_bytes_put, snd_soc_bytes_info},
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{SND_SOC_TPLG_CTL_RANGE, snd_soc_get_volsw_range,
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snd_soc_put_volsw_range, snd_soc_info_volsw_range},
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{SND_SOC_TPLG_CTL_VOLSW_XR_SX, snd_soc_get_xr_sx,
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snd_soc_put_xr_sx, snd_soc_info_xr_sx},
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{SND_SOC_TPLG_CTL_STROBE, snd_soc_get_strobe,
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snd_soc_put_strobe, NULL},
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{SND_SOC_TPLG_DAPM_CTL_VOLSW, snd_soc_dapm_get_volsw,
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2015-07-14 07:40:47 +00:00
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snd_soc_dapm_put_volsw, snd_soc_info_volsw},
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2015-05-29 18:06:14 +00:00
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{SND_SOC_TPLG_DAPM_CTL_ENUM_DOUBLE, snd_soc_dapm_get_enum_double,
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snd_soc_dapm_put_enum_double, snd_soc_info_enum_double},
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{SND_SOC_TPLG_DAPM_CTL_ENUM_VIRT, snd_soc_dapm_get_enum_double,
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snd_soc_dapm_put_enum_double, NULL},
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{SND_SOC_TPLG_DAPM_CTL_ENUM_VALUE, snd_soc_dapm_get_enum_double,
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snd_soc_dapm_put_enum_double, NULL},
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{SND_SOC_TPLG_DAPM_CTL_PIN, snd_soc_dapm_get_pin_switch,
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snd_soc_dapm_put_pin_switch, snd_soc_dapm_info_pin_switch},
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};
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struct soc_tplg_map {
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int uid;
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int kid;
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};
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/* mapping of widget types from UAPI IDs to kernel IDs */
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static const struct soc_tplg_map dapm_map[] = {
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{SND_SOC_TPLG_DAPM_INPUT, snd_soc_dapm_input},
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{SND_SOC_TPLG_DAPM_OUTPUT, snd_soc_dapm_output},
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{SND_SOC_TPLG_DAPM_MUX, snd_soc_dapm_mux},
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{SND_SOC_TPLG_DAPM_MIXER, snd_soc_dapm_mixer},
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{SND_SOC_TPLG_DAPM_PGA, snd_soc_dapm_pga},
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{SND_SOC_TPLG_DAPM_OUT_DRV, snd_soc_dapm_out_drv},
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{SND_SOC_TPLG_DAPM_ADC, snd_soc_dapm_adc},
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{SND_SOC_TPLG_DAPM_DAC, snd_soc_dapm_dac},
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{SND_SOC_TPLG_DAPM_SWITCH, snd_soc_dapm_switch},
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{SND_SOC_TPLG_DAPM_PRE, snd_soc_dapm_pre},
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{SND_SOC_TPLG_DAPM_POST, snd_soc_dapm_post},
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{SND_SOC_TPLG_DAPM_AIF_IN, snd_soc_dapm_aif_in},
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{SND_SOC_TPLG_DAPM_AIF_OUT, snd_soc_dapm_aif_out},
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{SND_SOC_TPLG_DAPM_DAI_IN, snd_soc_dapm_dai_in},
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{SND_SOC_TPLG_DAPM_DAI_OUT, snd_soc_dapm_dai_out},
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{SND_SOC_TPLG_DAPM_DAI_LINK, snd_soc_dapm_dai_link},
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2017-06-29 13:22:24 +00:00
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{SND_SOC_TPLG_DAPM_BUFFER, snd_soc_dapm_buffer},
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{SND_SOC_TPLG_DAPM_SCHEDULER, snd_soc_dapm_scheduler},
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{SND_SOC_TPLG_DAPM_EFFECT, snd_soc_dapm_effect},
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{SND_SOC_TPLG_DAPM_SIGGEN, snd_soc_dapm_siggen},
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{SND_SOC_TPLG_DAPM_SRC, snd_soc_dapm_src},
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{SND_SOC_TPLG_DAPM_ASRC, snd_soc_dapm_asrc},
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{SND_SOC_TPLG_DAPM_ENCODER, snd_soc_dapm_encoder},
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{SND_SOC_TPLG_DAPM_DECODER, snd_soc_dapm_decoder},
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2015-05-29 18:06:14 +00:00
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};
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2023-01-27 23:11:03 +00:00
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static int tplg_chan_get_reg(struct soc_tplg *tplg,
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2015-05-29 18:06:14 +00:00
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struct snd_soc_tplg_channel *chan, int map)
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{
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int i;
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for (i = 0; i < SND_SOC_TPLG_MAX_CHAN; i++) {
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2019-04-04 19:13:57 +00:00
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if (le32_to_cpu(chan[i].id) == map)
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return le32_to_cpu(chan[i].reg);
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2015-05-29 18:06:14 +00:00
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}
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return -EINVAL;
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}
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2023-01-27 23:11:03 +00:00
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static int tplg_chan_get_shift(struct soc_tplg *tplg,
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2015-05-29 18:06:14 +00:00
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struct snd_soc_tplg_channel *chan, int map)
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{
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int i;
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for (i = 0; i < SND_SOC_TPLG_MAX_CHAN; i++) {
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2019-04-04 19:13:57 +00:00
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if (le32_to_cpu(chan[i].id) == map)
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return le32_to_cpu(chan[i].shift);
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2015-05-29 18:06:14 +00:00
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}
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return -EINVAL;
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}
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static int get_widget_id(int tplg_type)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(dapm_map); i++) {
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if (tplg_type == dapm_map[i].uid)
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return dapm_map[i].kid;
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}
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return -EINVAL;
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}
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static inline void soc_bind_err(struct soc_tplg *tplg,
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struct snd_soc_tplg_ctl_hdr *hdr, int index)
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{
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dev_err(tplg->dev,
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"ASoC: invalid control type (g,p,i) %d:%d:%d index %d at 0x%lx\n",
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hdr->ops.get, hdr->ops.put, hdr->ops.info, index,
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soc_tplg_get_offset(tplg));
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}
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static inline void soc_control_err(struct soc_tplg *tplg,
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struct snd_soc_tplg_ctl_hdr *hdr, const char *name)
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{
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dev_err(tplg->dev,
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2022-04-01 12:01:59 +00:00
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"ASoC: no complete control IO handler for %s type (g,p,i) %d:%d:%d at 0x%lx\n",
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2015-05-29 18:06:14 +00:00
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name, hdr->ops.get, hdr->ops.put, hdr->ops.info,
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soc_tplg_get_offset(tplg));
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}
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/* pass vendor data to component driver for processing */
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2020-05-27 02:28:01 +00:00
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static int soc_tplg_vendor_load(struct soc_tplg *tplg,
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struct snd_soc_tplg_hdr *hdr)
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2015-05-29 18:06:14 +00:00
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{
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int ret = 0;
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2020-03-12 12:22:39 +00:00
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if (tplg->ops && tplg->ops->vendor_load)
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2018-06-14 19:50:37 +00:00
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ret = tplg->ops->vendor_load(tplg->comp, tplg->index, hdr);
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2015-05-29 18:06:14 +00:00
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else {
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dev_err(tplg->dev, "ASoC: no vendor load callback for ID %d\n",
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hdr->vendor_type);
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return -EINVAL;
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}
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if (ret < 0)
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dev_err(tplg->dev,
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"ASoC: vendor load failed at hdr offset %ld/0x%lx for type %d:%d\n",
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soc_tplg_get_hdr_offset(tplg),
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soc_tplg_get_hdr_offset(tplg),
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hdr->type, hdr->vendor_type);
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return ret;
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}
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/* optionally pass new dynamic widget to component driver. This is mainly for
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* external widgets where we can assign private data/ops */
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static int soc_tplg_widget_load(struct soc_tplg *tplg,
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struct snd_soc_dapm_widget *w, struct snd_soc_tplg_dapm_widget *tplg_w)
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{
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2020-03-12 12:22:39 +00:00
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if (tplg->ops && tplg->ops->widget_load)
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2018-06-14 19:50:37 +00:00
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return tplg->ops->widget_load(tplg->comp, tplg->index, w,
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tplg_w);
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2015-05-29 18:06:14 +00:00
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return 0;
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}
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2017-06-09 14:43:23 +00:00
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/* optionally pass new dynamic widget to component driver. This is mainly for
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* external widgets where we can assign private data/ops */
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static int soc_tplg_widget_ready(struct soc_tplg *tplg,
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struct snd_soc_dapm_widget *w, struct snd_soc_tplg_dapm_widget *tplg_w)
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{
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2020-03-12 12:22:39 +00:00
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|
|
if (tplg->ops && tplg->ops->widget_ready)
|
2018-06-14 19:50:37 +00:00
|
|
|
return tplg->ops->widget_ready(tplg->comp, tplg->index, w,
|
|
|
|
tplg_w);
|
2017-06-09 14:43:23 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-02-27 22:29:20 +00:00
|
|
|
/* pass DAI configurations to component driver for extra initialization */
|
2016-01-15 08:13:28 +00:00
|
|
|
static int soc_tplg_dai_load(struct soc_tplg *tplg,
|
2018-06-14 19:50:37 +00:00
|
|
|
struct snd_soc_dai_driver *dai_drv,
|
|
|
|
struct snd_soc_tplg_pcm *pcm, struct snd_soc_dai *dai)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->dai_load)
|
2018-06-14 19:50:37 +00:00
|
|
|
return tplg->ops->dai_load(tplg->comp, tplg->index, dai_drv,
|
|
|
|
pcm, dai);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-02-27 22:29:20 +00:00
|
|
|
/* pass link configurations to component driver for extra initialization */
|
2016-01-15 08:13:37 +00:00
|
|
|
static int soc_tplg_dai_link_load(struct soc_tplg *tplg,
|
2018-06-14 19:50:37 +00:00
|
|
|
struct snd_soc_dai_link *link, struct snd_soc_tplg_link_config *cfg)
|
2016-01-15 08:13:37 +00:00
|
|
|
{
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->link_load)
|
2018-06-14 19:50:37 +00:00
|
|
|
return tplg->ops->link_load(tplg->comp, tplg->index, link, cfg);
|
2016-01-15 08:13:37 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
/* tell the component driver that all firmware has been loaded in this request */
|
2021-09-27 12:05:06 +00:00
|
|
|
static int soc_tplg_complete(struct soc_tplg *tplg)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->complete)
|
2021-09-27 12:05:06 +00:00
|
|
|
return tplg->ops->complete(tplg->comp);
|
|
|
|
|
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* add a dynamic kcontrol */
|
|
|
|
static int soc_tplg_add_dcontrol(struct snd_card *card, struct device *dev,
|
|
|
|
const struct snd_kcontrol_new *control_new, const char *prefix,
|
|
|
|
void *data, struct snd_kcontrol **kcontrol)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
*kcontrol = snd_soc_cnew(control_new, data, control_new->name, prefix);
|
|
|
|
if (*kcontrol == NULL) {
|
|
|
|
dev_err(dev, "ASoC: Failed to create new kcontrol %s\n",
|
|
|
|
control_new->name);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = snd_ctl_add(card, *kcontrol);
|
|
|
|
if (err < 0) {
|
|
|
|
dev_err(dev, "ASoC: Failed to add %s: %d\n",
|
|
|
|
control_new->name, err);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add a dynamic kcontrol for component driver */
|
|
|
|
static int soc_tplg_add_kcontrol(struct soc_tplg *tplg,
|
|
|
|
struct snd_kcontrol_new *k, struct snd_kcontrol **kcontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_component *comp = tplg->comp;
|
|
|
|
|
|
|
|
return soc_tplg_add_dcontrol(comp->card->snd_card,
|
2021-10-15 16:12:55 +00:00
|
|
|
tplg->dev, k, comp->name_prefix, comp, kcontrol);
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2023-01-27 23:11:10 +00:00
|
|
|
/* remove kcontrol */
|
|
|
|
static void soc_tplg_remove_kcontrol(struct snd_soc_component *comp, struct snd_soc_dobj *dobj,
|
|
|
|
int pass)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_card *card = comp->card->snd_card;
|
|
|
|
|
2022-04-01 12:01:58 +00:00
|
|
|
if (pass != SOC_TPLG_PASS_CONTROL)
|
2015-05-29 18:06:14 +00:00
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-01-25 20:06:42 +00:00
|
|
|
snd_ctl_remove(card, dobj->control.kcontrol);
|
|
|
|
list_del(&dobj->list);
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2019-01-25 20:06:47 +00:00
|
|
|
/* remove a route */
|
2023-01-27 23:11:05 +00:00
|
|
|
static void soc_tplg_remove_route(struct snd_soc_component *comp,
|
2019-01-25 20:06:47 +00:00
|
|
|
struct snd_soc_dobj *dobj, int pass)
|
|
|
|
{
|
|
|
|
if (pass != SOC_TPLG_PASS_GRAPH)
|
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2019-01-25 20:06:47 +00:00
|
|
|
|
|
|
|
list_del(&dobj->list);
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
/* remove a widget and it's kcontrols - routes must be removed first */
|
2023-01-27 23:11:05 +00:00
|
|
|
static void soc_tplg_remove_widget(struct snd_soc_component *comp,
|
2015-05-29 18:06:14 +00:00
|
|
|
struct snd_soc_dobj *dobj, int pass)
|
|
|
|
{
|
|
|
|
struct snd_card *card = comp->card->snd_card;
|
|
|
|
struct snd_soc_dapm_widget *w =
|
|
|
|
container_of(dobj, struct snd_soc_dapm_widget, dobj);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (pass != SOC_TPLG_PASS_WIDGET)
|
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2018-03-14 20:42:40 +00:00
|
|
|
if (!w->kcontrols)
|
|
|
|
goto free_news;
|
|
|
|
|
2020-10-30 14:54:27 +00:00
|
|
|
for (i = 0; w->kcontrols && i < w->num_kcontrols; i++)
|
|
|
|
snd_ctl_remove(card, w->kcontrols[i]);
|
2018-03-14 20:42:40 +00:00
|
|
|
|
|
|
|
free_news:
|
|
|
|
|
2019-01-25 20:06:43 +00:00
|
|
|
list_del(&dobj->list);
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
/* widget w is freed by soc-dapm.c */
|
|
|
|
}
|
|
|
|
|
2016-01-15 08:13:28 +00:00
|
|
|
/* remove DAI configurations */
|
2023-01-27 23:11:05 +00:00
|
|
|
static void soc_tplg_remove_dai(struct snd_soc_component *comp,
|
2015-05-29 18:06:14 +00:00
|
|
|
struct snd_soc_dobj *dobj, int pass)
|
|
|
|
{
|
2016-01-15 08:13:28 +00:00
|
|
|
struct snd_soc_dai_driver *dai_drv =
|
|
|
|
container_of(dobj, struct snd_soc_dai_driver, dobj);
|
2021-01-20 15:28:42 +00:00
|
|
|
struct snd_soc_dai *dai, *_dai;
|
2016-01-15 08:13:28 +00:00
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
if (pass != SOC_TPLG_PASS_PCM_DAI)
|
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-01-20 15:28:42 +00:00
|
|
|
for_each_component_dais_safe(comp, dai, _dai)
|
2019-02-01 17:05:13 +00:00
|
|
|
if (dai->driver == dai_drv)
|
2021-01-20 15:28:42 +00:00
|
|
|
snd_soc_unregister_dai(dai);
|
2019-02-01 17:05:13 +00:00
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
list_del(&dobj->list);
|
|
|
|
}
|
|
|
|
|
2016-01-15 08:13:37 +00:00
|
|
|
/* remove link configurations */
|
2023-01-27 23:11:05 +00:00
|
|
|
static void soc_tplg_remove_link(struct snd_soc_component *comp,
|
2016-01-15 08:13:37 +00:00
|
|
|
struct snd_soc_dobj *dobj, int pass)
|
|
|
|
{
|
|
|
|
struct snd_soc_dai_link *link =
|
|
|
|
container_of(dobj, struct snd_soc_dai_link, dobj);
|
|
|
|
|
|
|
|
if (pass != SOC_TPLG_PASS_PCM_DAI)
|
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2016-01-15 08:13:37 +00:00
|
|
|
|
2019-12-04 21:04:47 +00:00
|
|
|
list_del(&dobj->list);
|
2019-12-10 00:34:23 +00:00
|
|
|
snd_soc_remove_pcm_runtime(comp->card,
|
|
|
|
snd_soc_get_pcm_runtime(comp->card, link));
|
2016-01-15 08:13:37 +00:00
|
|
|
}
|
|
|
|
|
2019-02-01 17:07:40 +00:00
|
|
|
/* unload dai link */
|
|
|
|
static void remove_backend_link(struct snd_soc_component *comp,
|
|
|
|
struct snd_soc_dobj *dobj, int pass)
|
|
|
|
{
|
|
|
|
if (pass != SOC_TPLG_PASS_LINK)
|
|
|
|
return;
|
|
|
|
|
2023-01-27 23:11:11 +00:00
|
|
|
if (dobj->unload)
|
|
|
|
dobj->unload(comp, dobj);
|
2019-02-01 17:07:40 +00:00
|
|
|
|
|
|
|
/*
|
2023-01-27 23:11:05 +00:00
|
|
|
* We don't free the link here as what soc_tplg_remove_link() do since BE
|
2019-02-01 17:07:40 +00:00
|
|
|
* links are not allocated by topology.
|
|
|
|
* We however need to reset the dobj type to its initial values
|
|
|
|
*/
|
|
|
|
dobj->type = SND_SOC_DOBJ_NONE;
|
|
|
|
list_del(&dobj->list);
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
/* bind a kcontrol to it's IO handlers */
|
|
|
|
static int soc_tplg_kcontrol_bind_io(struct snd_soc_tplg_ctl_hdr *hdr,
|
|
|
|
struct snd_kcontrol_new *k,
|
2015-08-18 10:12:01 +00:00
|
|
|
const struct soc_tplg *tplg)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
2015-08-18 10:12:01 +00:00
|
|
|
const struct snd_soc_tplg_kcontrol_ops *ops;
|
2015-08-18 10:12:20 +00:00
|
|
|
const struct snd_soc_tplg_bytes_ext_ops *ext_ops;
|
2015-08-18 10:12:01 +00:00
|
|
|
int num_ops, i;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(hdr->ops.info) == SND_SOC_TPLG_CTL_BYTES
|
2015-08-18 10:12:20 +00:00
|
|
|
&& k->iface & SNDRV_CTL_ELEM_IFACE_MIXER
|
2022-01-12 17:00:29 +00:00
|
|
|
&& (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_READ
|
|
|
|
|| k->access & SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
|
2015-08-18 10:12:20 +00:00
|
|
|
&& k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
|
|
|
|
struct soc_bytes_ext *sbe;
|
|
|
|
struct snd_soc_tplg_bytes_control *be;
|
|
|
|
|
|
|
|
sbe = (struct soc_bytes_ext *)k->private_value;
|
|
|
|
be = container_of(hdr, struct snd_soc_tplg_bytes_control, hdr);
|
|
|
|
|
|
|
|
/* TLV bytes controls need standard kcontrol info handler,
|
|
|
|
* TLV callback and extended put/get handlers.
|
|
|
|
*/
|
2015-11-09 17:50:01 +00:00
|
|
|
k->info = snd_soc_bytes_info_ext;
|
2015-08-18 10:12:20 +00:00
|
|
|
k->tlv.c = snd_soc_bytes_tlv_callback;
|
|
|
|
|
2020-09-17 10:39:12 +00:00
|
|
|
/*
|
|
|
|
* When a topology-based implementation abuses the
|
|
|
|
* control interface and uses bytes_ext controls of
|
|
|
|
* more than 512 bytes, we need to disable the size
|
|
|
|
* checks, otherwise accesses to such controls will
|
|
|
|
* return an -EINVAL error and prevent the card from
|
|
|
|
* being configured.
|
|
|
|
*/
|
2022-06-09 12:02:16 +00:00
|
|
|
if (sbe->max > 512)
|
2020-09-17 10:39:12 +00:00
|
|
|
k->access |= SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK;
|
|
|
|
|
2015-08-18 10:12:20 +00:00
|
|
|
ext_ops = tplg->bytes_ext_ops;
|
|
|
|
num_ops = tplg->bytes_ext_ops_count;
|
|
|
|
for (i = 0; i < num_ops; i++) {
|
2020-01-02 19:59:52 +00:00
|
|
|
if (!sbe->put &&
|
|
|
|
ext_ops[i].id == le32_to_cpu(be->ext_ops.put))
|
2015-08-18 10:12:20 +00:00
|
|
|
sbe->put = ext_ops[i].put;
|
2020-01-02 19:59:52 +00:00
|
|
|
if (!sbe->get &&
|
|
|
|
ext_ops[i].id == le32_to_cpu(be->ext_ops.get))
|
2015-08-18 10:12:20 +00:00
|
|
|
sbe->get = ext_ops[i].get;
|
|
|
|
}
|
|
|
|
|
2020-09-08 09:28:24 +00:00
|
|
|
if ((k->access & SNDRV_CTL_ELEM_ACCESS_TLV_READ) && !sbe->get)
|
2015-08-18 10:12:20 +00:00
|
|
|
return -EINVAL;
|
2020-09-08 09:28:24 +00:00
|
|
|
if ((k->access & SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) && !sbe->put)
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
2015-08-18 10:12:20 +00:00
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2015-08-18 10:11:51 +00:00
|
|
|
/* try and map vendor specific kcontrol handlers first */
|
2015-08-18 10:12:01 +00:00
|
|
|
ops = tplg->io_ops;
|
|
|
|
num_ops = tplg->io_ops_count;
|
2015-05-29 18:06:14 +00:00
|
|
|
for (i = 0; i < num_ops; i++) {
|
|
|
|
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->put == NULL && ops[i].id == le32_to_cpu(hdr->ops.put))
|
2015-05-29 18:06:14 +00:00
|
|
|
k->put = ops[i].put;
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->get == NULL && ops[i].id == le32_to_cpu(hdr->ops.get))
|
2015-05-29 18:06:14 +00:00
|
|
|
k->get = ops[i].get;
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->info == NULL && ops[i].id == le32_to_cpu(hdr->ops.info))
|
2015-05-29 18:06:14 +00:00
|
|
|
k->info = ops[i].info;
|
|
|
|
}
|
|
|
|
|
2015-08-18 10:11:51 +00:00
|
|
|
/* vendor specific handlers found ? */
|
2015-05-29 18:06:14 +00:00
|
|
|
if (k->put && k->get && k->info)
|
|
|
|
return 0;
|
|
|
|
|
2015-08-18 10:11:51 +00:00
|
|
|
/* none found so try standard kcontrol handlers */
|
2015-08-18 10:12:01 +00:00
|
|
|
ops = io_ops;
|
|
|
|
num_ops = ARRAY_SIZE(io_ops);
|
2015-08-18 10:11:51 +00:00
|
|
|
for (i = 0; i < num_ops; i++) {
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->put == NULL && ops[i].id == le32_to_cpu(hdr->ops.put))
|
2015-08-18 10:11:51 +00:00
|
|
|
k->put = ops[i].put;
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->get == NULL && ops[i].id == le32_to_cpu(hdr->ops.get))
|
2015-08-18 10:11:51 +00:00
|
|
|
k->get = ops[i].get;
|
2020-01-02 19:59:52 +00:00
|
|
|
if (k->info == NULL && ops[i].id == le32_to_cpu(hdr->ops.info))
|
2015-08-18 10:11:51 +00:00
|
|
|
k->info = ops[i].info;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2015-08-18 10:11:51 +00:00
|
|
|
/* standard handlers found ? */
|
2015-05-29 18:06:14 +00:00
|
|
|
if (k->put && k->get && k->info)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* nothing to bind */
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* bind a widgets to it's evnt handlers */
|
|
|
|
int snd_soc_tplg_widget_bind_event(struct snd_soc_dapm_widget *w,
|
|
|
|
const struct snd_soc_tplg_widget_events *events,
|
|
|
|
int num_events, u16 event_type)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
w->event = NULL;
|
|
|
|
|
|
|
|
for (i = 0; i < num_events; i++) {
|
|
|
|
if (event_type == events[i].type) {
|
|
|
|
|
|
|
|
/* found - so assign event */
|
|
|
|
w->event = events[i].event_handler;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* not found */
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_soc_tplg_widget_bind_event);
|
|
|
|
|
|
|
|
/* optionally pass new dynamic kcontrol to component driver. */
|
2022-04-01 12:02:00 +00:00
|
|
|
static int soc_tplg_control_load(struct soc_tplg *tplg,
|
2015-05-29 18:06:14 +00:00
|
|
|
struct snd_kcontrol_new *k, struct snd_soc_tplg_ctl_hdr *hdr)
|
|
|
|
{
|
2023-05-19 19:56:07 +00:00
|
|
|
int ret = 0;
|
|
|
|
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->control_load)
|
2023-05-19 19:56:07 +00:00
|
|
|
ret = tplg->ops->control_load(tplg->comp, tplg->index, k, hdr);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2023-05-19 19:56:07 +00:00
|
|
|
if (ret)
|
|
|
|
dev_err(tplg->dev, "ASoC: failed to init %s\n", hdr->name);
|
|
|
|
|
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-08-05 13:41:13 +00:00
|
|
|
static int soc_tplg_create_tlv_db_scale(struct soc_tplg *tplg,
|
|
|
|
struct snd_kcontrol_new *kc, struct snd_soc_tplg_tlv_dbscale *scale)
|
|
|
|
{
|
|
|
|
unsigned int item_len = 2 * sizeof(unsigned int);
|
|
|
|
unsigned int *p;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
p = devm_kzalloc(tplg->dev, item_len + 2 * sizeof(unsigned int), GFP_KERNEL);
|
2015-08-05 13:41:13 +00:00
|
|
|
if (!p)
|
2015-05-29 18:06:14 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2015-08-05 13:41:13 +00:00
|
|
|
p[0] = SNDRV_CTL_TLVT_DB_SCALE;
|
|
|
|
p[1] = item_len;
|
2019-04-04 19:13:57 +00:00
|
|
|
p[2] = le32_to_cpu(scale->min);
|
|
|
|
p[3] = (le32_to_cpu(scale->step) & TLV_DB_SCALE_MASK)
|
|
|
|
| (le32_to_cpu(scale->mute) ? TLV_DB_SCALE_MUTE : 0);
|
2015-08-05 13:41:13 +00:00
|
|
|
|
|
|
|
kc->tlv.p = (void *)p;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_create_tlv(struct soc_tplg *tplg,
|
|
|
|
struct snd_kcontrol_new *kc, struct snd_soc_tplg_ctl_hdr *tc)
|
|
|
|
{
|
|
|
|
struct snd_soc_tplg_ctl_tlv *tplg_tlv;
|
2019-04-04 19:13:57 +00:00
|
|
|
u32 access = le32_to_cpu(tc->access);
|
2015-08-05 13:41:13 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (!(access & SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE))
|
2015-08-05 13:41:13 +00:00
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (!(access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK)) {
|
2015-08-05 13:41:13 +00:00
|
|
|
tplg_tlv = &tc->tlv;
|
2019-04-04 19:13:57 +00:00
|
|
|
switch (le32_to_cpu(tplg_tlv->type)) {
|
2015-08-05 13:41:13 +00:00
|
|
|
case SNDRV_CTL_TLVT_DB_SCALE:
|
|
|
|
return soc_tplg_create_tlv_db_scale(tplg, kc,
|
|
|
|
&tplg_tlv->scale);
|
|
|
|
|
|
|
|
/* TODO: add support for other TLV types */
|
|
|
|
default:
|
|
|
|
dev_dbg(tplg->dev, "Unsupported TLV type %d\n",
|
|
|
|
tplg_tlv->type);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
static int soc_tplg_dbytes_create(struct soc_tplg *tplg, size_t size)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_tplg_bytes_control *be;
|
|
|
|
struct soc_bytes_ext *sbe;
|
|
|
|
struct snd_kcontrol_new kc;
|
2022-04-01 12:01:56 +00:00
|
|
|
int ret = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
if (soc_tplg_check_elem_count(tplg,
|
2022-01-12 17:00:28 +00:00
|
|
|
sizeof(struct snd_soc_tplg_bytes_control),
|
2022-04-01 12:01:56 +00:00
|
|
|
1, size, "mixer bytes"))
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
be = (struct snd_soc_tplg_bytes_control *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(be->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
sbe = devm_kzalloc(tplg->dev, sizeof(*sbe), GFP_KERNEL);
|
|
|
|
if (sbe == NULL)
|
|
|
|
return -ENOMEM;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
tplg->pos += (sizeof(struct snd_soc_tplg_bytes_control) +
|
|
|
|
le32_to_cpu(be->priv.size));
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev,
|
|
|
|
"ASoC: adding bytes kcontrol %s with access 0x%x\n",
|
|
|
|
be->hdr.name, be->hdr.access);
|
|
|
|
|
|
|
|
memset(&kc, 0, sizeof(kc));
|
|
|
|
kc.name = be->hdr.name;
|
|
|
|
kc.private_value = (long)sbe;
|
|
|
|
kc.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc.access = le32_to_cpu(be->hdr.access);
|
|
|
|
|
|
|
|
sbe->max = le32_to_cpu(be->max);
|
|
|
|
sbe->dobj.type = SND_SOC_DOBJ_BYTES;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
sbe->dobj.unload = tplg->ops->control_unload;
|
2022-04-01 12:01:56 +00:00
|
|
|
INIT_LIST_HEAD(&sbe->dobj.list);
|
|
|
|
|
|
|
|
/* map io handlers */
|
|
|
|
ret = soc_tplg_kcontrol_bind_io(&be->hdr, &kc, tplg);
|
|
|
|
if (ret) {
|
|
|
|
soc_control_err(tplg, &be->hdr, be->hdr.name);
|
|
|
|
goto err;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
ret = soc_tplg_control_load(tplg, &kc, &be->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* register control here */
|
|
|
|
ret = soc_tplg_add_kcontrol(tplg, &kc, &sbe->dobj.control.kcontrol);
|
2023-05-19 19:56:08 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
list_add(&sbe->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
static int soc_tplg_dmixer_create(struct soc_tplg *tplg, size_t size)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_tplg_mixer_control *mc;
|
|
|
|
struct soc_mixer_control *sm;
|
|
|
|
struct snd_kcontrol_new kc;
|
2022-04-01 12:01:56 +00:00
|
|
|
int ret = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
if (soc_tplg_check_elem_count(tplg,
|
2022-01-12 17:00:28 +00:00
|
|
|
sizeof(struct snd_soc_tplg_mixer_control),
|
2022-04-01 12:01:56 +00:00
|
|
|
1, size, "mixers"))
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
mc = (struct snd_soc_tplg_mixer_control *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(mc->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
sm = devm_kzalloc(tplg->dev, sizeof(*sm), GFP_KERNEL);
|
|
|
|
if (sm == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
tplg->pos += (sizeof(struct snd_soc_tplg_mixer_control) +
|
|
|
|
le32_to_cpu(mc->priv.size));
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev,
|
|
|
|
"ASoC: adding mixer kcontrol %s with access 0x%x\n",
|
|
|
|
mc->hdr.name, mc->hdr.access);
|
|
|
|
|
|
|
|
memset(&kc, 0, sizeof(kc));
|
|
|
|
kc.name = mc->hdr.name;
|
|
|
|
kc.private_value = (long)sm;
|
|
|
|
kc.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc.access = le32_to_cpu(mc->hdr.access);
|
|
|
|
|
|
|
|
/* we only support FL/FR channel mapping atm */
|
2023-01-27 23:11:03 +00:00
|
|
|
sm->reg = tplg_chan_get_reg(tplg, mc->channel, SNDRV_CHMAP_FL);
|
|
|
|
sm->rreg = tplg_chan_get_reg(tplg, mc->channel, SNDRV_CHMAP_FR);
|
|
|
|
sm->shift = tplg_chan_get_shift(tplg, mc->channel, SNDRV_CHMAP_FL);
|
|
|
|
sm->rshift = tplg_chan_get_shift(tplg, mc->channel, SNDRV_CHMAP_FR);
|
2022-04-01 12:01:56 +00:00
|
|
|
|
|
|
|
sm->max = le32_to_cpu(mc->max);
|
|
|
|
sm->min = le32_to_cpu(mc->min);
|
|
|
|
sm->invert = le32_to_cpu(mc->invert);
|
|
|
|
sm->platform_max = le32_to_cpu(mc->platform_max);
|
|
|
|
sm->dobj.index = tplg->index;
|
|
|
|
sm->dobj.type = SND_SOC_DOBJ_MIXER;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
sm->dobj.unload = tplg->ops->control_unload;
|
2022-04-01 12:01:56 +00:00
|
|
|
INIT_LIST_HEAD(&sm->dobj.list);
|
|
|
|
|
|
|
|
/* map io handlers */
|
|
|
|
ret = soc_tplg_kcontrol_bind_io(&mc->hdr, &kc, tplg);
|
|
|
|
if (ret) {
|
|
|
|
soc_control_err(tplg, &mc->hdr, mc->hdr.name);
|
|
|
|
goto err;
|
|
|
|
}
|
2019-03-13 13:49:43 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* create any TLV data */
|
|
|
|
ret = soc_tplg_create_tlv(tplg, &kc, &mc->hdr);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: failed to create TLV %s\n", mc->hdr.name);
|
|
|
|
goto err;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
ret = soc_tplg_control_load(tplg, &kc, &mc->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* register control here */
|
|
|
|
ret = soc_tplg_add_kcontrol(tplg, &kc, &sm->dobj.control.kcontrol);
|
2023-05-19 19:56:08 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
list_add(&sm->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
static int soc_tplg_denum_create_texts(struct soc_tplg *tplg, struct soc_enum *se,
|
|
|
|
struct snd_soc_tplg_enum_control *ec)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
int i, ret;
|
|
|
|
|
2020-12-10 15:25:41 +00:00
|
|
|
if (le32_to_cpu(ec->items) > ARRAY_SIZE(ec->texts))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
se->dobj.control.dtexts =
|
2020-10-30 14:54:25 +00:00
|
|
|
devm_kcalloc(tplg->dev, le32_to_cpu(ec->items), sizeof(char *), GFP_KERNEL);
|
2015-05-29 18:06:14 +00:00
|
|
|
if (se->dobj.control.dtexts == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2020-01-02 19:59:52 +00:00
|
|
|
for (i = 0; i < le32_to_cpu(ec->items); i++) {
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
if (strnlen(ec->texts[i], SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
se->dobj.control.dtexts[i] = devm_kstrdup(tplg->dev, ec->texts[i], GFP_KERNEL);
|
2015-05-29 18:06:14 +00:00
|
|
|
if (!se->dobj.control.dtexts[i]) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-06-17 11:36:43 +00:00
|
|
|
se->items = le32_to_cpu(ec->items);
|
2017-04-11 07:36:22 +00:00
|
|
|
se->texts = (const char * const *)se->dobj.control.dtexts;
|
2015-05-29 18:06:14 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
2019-06-17 11:36:43 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
static int soc_tplg_denum_create_values(struct soc_tplg *tplg, struct soc_enum *se,
|
|
|
|
struct snd_soc_tplg_enum_control *ec)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
2019-04-04 19:13:57 +00:00
|
|
|
int i;
|
|
|
|
|
2020-12-10 15:25:40 +00:00
|
|
|
/*
|
|
|
|
* Following "if" checks if we have at most SND_SOC_TPLG_NUM_TEXTS
|
|
|
|
* values instead of using ARRAY_SIZE(ec->values) due to the fact that
|
|
|
|
* it is oversized for its purpose. Additionally it is done so because
|
|
|
|
* it is defined in UAPI header where it can't be easily changed.
|
|
|
|
*/
|
|
|
|
if (le32_to_cpu(ec->items) > SND_SOC_TPLG_NUM_TEXTS)
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2020-12-10 15:25:40 +00:00
|
|
|
se->dobj.control.dvalues = devm_kcalloc(tplg->dev, le32_to_cpu(ec->items),
|
2021-01-20 09:59:13 +00:00
|
|
|
sizeof(*se->dobj.control.dvalues),
|
2015-08-07 07:59:37 +00:00
|
|
|
GFP_KERNEL);
|
2015-05-29 18:06:14 +00:00
|
|
|
if (!se->dobj.control.dvalues)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
/* convert from little-endian */
|
|
|
|
for (i = 0; i < le32_to_cpu(ec->items); i++) {
|
|
|
|
se->dobj.control.dvalues[i] = le32_to_cpu(ec->values[i]);
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
static int soc_tplg_denum_create(struct soc_tplg *tplg, size_t size)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_tplg_enum_control *ec;
|
|
|
|
struct soc_enum *se;
|
|
|
|
struct snd_kcontrol_new kc;
|
2022-04-01 12:01:56 +00:00
|
|
|
int ret = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
if (soc_tplg_check_elem_count(tplg,
|
2022-01-12 17:00:28 +00:00
|
|
|
sizeof(struct snd_soc_tplg_enum_control),
|
2022-04-01 12:01:56 +00:00
|
|
|
1, size, "enums"))
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
ec = (struct snd_soc_tplg_enum_control *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(ec->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
se = devm_kzalloc(tplg->dev, (sizeof(*se)), GFP_KERNEL);
|
|
|
|
if (se == NULL)
|
|
|
|
return -ENOMEM;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
tplg->pos += (sizeof(struct snd_soc_tplg_enum_control) +
|
|
|
|
le32_to_cpu(ec->priv.size));
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev, "ASoC: adding enum kcontrol %s size %d\n",
|
|
|
|
ec->hdr.name, ec->items);
|
|
|
|
|
|
|
|
memset(&kc, 0, sizeof(kc));
|
|
|
|
kc.name = ec->hdr.name;
|
|
|
|
kc.private_value = (long)se;
|
|
|
|
kc.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc.access = le32_to_cpu(ec->hdr.access);
|
|
|
|
|
2023-01-27 23:11:03 +00:00
|
|
|
se->reg = tplg_chan_get_reg(tplg, ec->channel, SNDRV_CHMAP_FL);
|
|
|
|
se->shift_l = tplg_chan_get_shift(tplg, ec->channel,
|
2022-04-01 12:01:56 +00:00
|
|
|
SNDRV_CHMAP_FL);
|
2023-01-27 23:11:03 +00:00
|
|
|
se->shift_r = tplg_chan_get_shift(tplg, ec->channel,
|
2022-04-01 12:01:56 +00:00
|
|
|
SNDRV_CHMAP_FL);
|
|
|
|
|
|
|
|
se->mask = le32_to_cpu(ec->mask);
|
|
|
|
se->dobj.index = tplg->index;
|
|
|
|
se->dobj.type = SND_SOC_DOBJ_ENUM;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
se->dobj.unload = tplg->ops->control_unload;
|
2022-04-01 12:01:56 +00:00
|
|
|
INIT_LIST_HEAD(&se->dobj.list);
|
|
|
|
|
|
|
|
switch (le32_to_cpu(ec->hdr.ops.info)) {
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VALUE:
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM_VALUE:
|
|
|
|
ret = soc_tplg_denum_create_values(tplg, se, ec);
|
|
|
|
if (ret < 0) {
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_err(tplg->dev,
|
2022-04-01 12:01:56 +00:00
|
|
|
"ASoC: could not create values for %s\n",
|
2015-05-29 18:06:14 +00:00
|
|
|
ec->hdr.name);
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
2022-04-01 12:01:56 +00:00
|
|
|
fallthrough;
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_DOUBLE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VIRT:
|
|
|
|
ret = soc_tplg_denum_create_texts(tplg, se, ec);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: could not create texts for %s\n",
|
2015-05-29 18:06:14 +00:00
|
|
|
ec->hdr.name);
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
2022-04-01 12:01:56 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: invalid enum control type %d for %s\n",
|
|
|
|
ec->hdr.ops.info, ec->hdr.name);
|
|
|
|
goto err;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* map io handlers */
|
|
|
|
ret = soc_tplg_kcontrol_bind_io(&ec->hdr, &kc, tplg);
|
|
|
|
if (ret) {
|
|
|
|
soc_control_err(tplg, &ec->hdr, ec->hdr.name);
|
|
|
|
goto err;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
2020-07-07 20:37:48 +00:00
|
|
|
|
2022-04-01 12:01:56 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
ret = soc_tplg_control_load(tplg, &kc, &ec->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* register control here */
|
|
|
|
ret = soc_tplg_add_kcontrol(tplg, &kc, &se->dobj.control.kcontrol);
|
2023-05-19 19:56:08 +00:00
|
|
|
if (ret < 0)
|
2022-04-01 12:01:56 +00:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
list_add(&se->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_kcontrol_elems_load(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2020-03-27 20:47:26 +00:00
|
|
|
int ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
int i;
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev, "ASoC: adding %d kcontrols at 0x%lx\n", hdr->count,
|
|
|
|
soc_tplg_get_offset(tplg));
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
for (i = 0; i < le32_to_cpu(hdr->count); i++) {
|
2021-08-02 06:01:04 +00:00
|
|
|
struct snd_soc_tplg_ctl_hdr *control_hdr = (struct snd_soc_tplg_ctl_hdr *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(control_hdr->size) != sizeof(*control_hdr)) {
|
2016-04-27 06:52:56 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: invalid control size\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
switch (le32_to_cpu(control_hdr->ops.info)) {
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_CTL_VOLSW:
|
|
|
|
case SND_SOC_TPLG_CTL_STROBE:
|
|
|
|
case SND_SOC_TPLG_CTL_VOLSW_SX:
|
|
|
|
case SND_SOC_TPLG_CTL_VOLSW_XR_SX:
|
|
|
|
case SND_SOC_TPLG_CTL_RANGE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_VOLSW:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_PIN:
|
2022-04-01 12:01:56 +00:00
|
|
|
ret = soc_tplg_dmixer_create(tplg, le32_to_cpu(hdr->payload_size));
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM:
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM_VALUE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_DOUBLE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VIRT:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VALUE:
|
2022-04-01 12:01:56 +00:00
|
|
|
ret = soc_tplg_denum_create(tplg, le32_to_cpu(hdr->payload_size));
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
|
|
|
case SND_SOC_TPLG_CTL_BYTES:
|
2022-04-01 12:01:56 +00:00
|
|
|
ret = soc_tplg_dbytes_create(tplg, le32_to_cpu(hdr->payload_size));
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
soc_bind_err(tplg, control_hdr, i);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2020-03-27 20:47:26 +00:00
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: invalid control\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-06-14 19:53:59 +00:00
|
|
|
/* optionally pass new dynamic kcontrol to component driver. */
|
|
|
|
static int soc_tplg_add_route(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_dapm_route *route)
|
|
|
|
{
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->dapm_route_load)
|
2018-06-14 19:53:59 +00:00
|
|
|
return tplg->ops->dapm_route_load(tplg->comp, tplg->index,
|
|
|
|
route);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
static int soc_tplg_dapm_graph_elems_load(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
|
|
|
struct snd_soc_dapm_context *dapm = &tplg->comp->dapm;
|
|
|
|
struct snd_soc_tplg_dapm_graph_elem *elem;
|
2022-01-12 17:00:30 +00:00
|
|
|
struct snd_soc_dapm_route *route;
|
2020-10-30 14:54:25 +00:00
|
|
|
int count, i;
|
2019-01-25 20:06:47 +00:00
|
|
|
int ret = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
count = le32_to_cpu(hdr->count);
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
if (soc_tplg_check_elem_count(tplg,
|
2022-01-12 17:00:28 +00:00
|
|
|
sizeof(struct snd_soc_tplg_dapm_graph_elem),
|
|
|
|
count, le32_to_cpu(hdr->payload_size), "graph"))
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2017-06-29 13:22:26 +00:00
|
|
|
dev_dbg(tplg->dev, "ASoC: adding %d DAPM routes for index %d\n", count,
|
|
|
|
hdr->index);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-01-25 20:06:47 +00:00
|
|
|
for (i = 0; i < count; i++) {
|
2022-01-12 17:00:30 +00:00
|
|
|
route = devm_kzalloc(tplg->dev, sizeof(*route), GFP_KERNEL);
|
|
|
|
if (!route)
|
2019-01-25 20:06:47 +00:00
|
|
|
return -ENOMEM;
|
2015-05-29 18:06:14 +00:00
|
|
|
elem = (struct snd_soc_tplg_dapm_graph_elem *)tplg->pos;
|
|
|
|
tplg->pos += sizeof(struct snd_soc_tplg_dapm_graph_elem);
|
|
|
|
|
|
|
|
/* validate routes */
|
|
|
|
if (strnlen(elem->source, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
2019-01-25 20:06:47 +00:00
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
if (strnlen(elem->sink, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
2019-01-25 20:06:47 +00:00
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
if (strnlen(elem->control, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
2019-01-25 20:06:47 +00:00
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2022-01-12 17:00:30 +00:00
|
|
|
route->source = elem->source;
|
|
|
|
route->sink = elem->sink;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-01-25 20:06:47 +00:00
|
|
|
/* set to NULL atm for tplg users */
|
2022-01-12 17:00:30 +00:00
|
|
|
route->connected = NULL;
|
2015-05-29 18:06:14 +00:00
|
|
|
if (strnlen(elem->control, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) == 0)
|
2022-01-12 17:00:30 +00:00
|
|
|
route->control = NULL;
|
2015-05-29 18:06:14 +00:00
|
|
|
else
|
2022-01-12 17:00:30 +00:00
|
|
|
route->control = elem->control;
|
2019-01-25 20:06:47 +00:00
|
|
|
|
|
|
|
/* add route dobj to dobj_list */
|
2022-01-12 17:00:30 +00:00
|
|
|
route->dobj.type = SND_SOC_DOBJ_GRAPH;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
2023-02-01 11:28:46 +00:00
|
|
|
route->dobj.unload = tplg->ops->dapm_route_unload;
|
2022-01-12 17:00:30 +00:00
|
|
|
route->dobj.index = tplg->index;
|
|
|
|
list_add(&route->dobj.list, &tplg->comp->dobj_list);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2022-01-12 17:00:30 +00:00
|
|
|
ret = soc_tplg_add_route(tplg, route);
|
2020-07-07 20:37:45 +00:00
|
|
|
if (ret < 0) {
|
2020-07-07 20:37:49 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: topology: add_route failed: %d\n", ret);
|
2020-03-27 20:47:27 +00:00
|
|
|
break;
|
2020-07-07 20:37:45 +00:00
|
|
|
}
|
2018-06-14 19:53:59 +00:00
|
|
|
|
2024-03-08 09:04:59 +00:00
|
|
|
ret = snd_soc_dapm_add_routes(dapm, route, 1);
|
|
|
|
if (ret) {
|
|
|
|
if (!dapm->card->disable_route_checks) {
|
|
|
|
dev_err(tplg->dev, "ASoC: dapm_add_routes failed: %d\n", ret);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
dev_info(tplg->dev,
|
|
|
|
"ASoC: disable_route_checks set, ignoring dapm_add_routes errors\n");
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2019-01-25 20:06:47 +00:00
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
static int soc_tplg_dapm_widget_dmixer_create(struct soc_tplg *tplg, struct snd_kcontrol_new *kc)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct soc_mixer_control *sm;
|
|
|
|
struct snd_soc_tplg_mixer_control *mc;
|
2021-05-07 07:02:46 +00:00
|
|
|
int err;
|
2019-06-17 11:36:44 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
mc = (struct snd_soc_tplg_mixer_control *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(mc->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
sm = devm_kzalloc(tplg->dev, sizeof(*sm), GFP_KERNEL);
|
|
|
|
if (!sm)
|
|
|
|
return -ENOMEM;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
tplg->pos += sizeof(struct snd_soc_tplg_mixer_control) +
|
|
|
|
le32_to_cpu(mc->priv.size);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
dev_dbg(tplg->dev, " adding DAPM widget mixer control %s\n",
|
|
|
|
mc->hdr.name);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
kc->private_value = (long)sm;
|
|
|
|
kc->name = devm_kstrdup(tplg->dev, mc->hdr.name, GFP_KERNEL);
|
|
|
|
if (!kc->name)
|
|
|
|
return -ENOMEM;
|
|
|
|
kc->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc->access = le32_to_cpu(mc->hdr.access);
|
|
|
|
|
|
|
|
/* we only support FL/FR channel mapping atm */
|
2023-01-27 23:11:03 +00:00
|
|
|
sm->reg = tplg_chan_get_reg(tplg, mc->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FL);
|
2023-01-27 23:11:03 +00:00
|
|
|
sm->rreg = tplg_chan_get_reg(tplg, mc->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FR);
|
2023-01-27 23:11:03 +00:00
|
|
|
sm->shift = tplg_chan_get_shift(tplg, mc->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FL);
|
2023-01-27 23:11:03 +00:00
|
|
|
sm->rshift = tplg_chan_get_shift(tplg, mc->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FR);
|
|
|
|
|
|
|
|
sm->max = le32_to_cpu(mc->max);
|
|
|
|
sm->min = le32_to_cpu(mc->min);
|
|
|
|
sm->invert = le32_to_cpu(mc->invert);
|
|
|
|
sm->platform_max = le32_to_cpu(mc->platform_max);
|
|
|
|
sm->dobj.index = tplg->index;
|
|
|
|
INIT_LIST_HEAD(&sm->dobj.list);
|
|
|
|
|
|
|
|
/* map io handlers */
|
|
|
|
err = soc_tplg_kcontrol_bind_io(&mc->hdr, kc, tplg);
|
|
|
|
if (err) {
|
|
|
|
soc_control_err(tplg, &mc->hdr, mc->hdr.name);
|
|
|
|
return err;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* create any TLV data */
|
|
|
|
err = soc_tplg_create_tlv(tplg, kc, &mc->hdr);
|
|
|
|
if (err < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: failed to create TLV %s\n",
|
|
|
|
mc->hdr.name);
|
|
|
|
return err;
|
|
|
|
}
|
2019-03-13 13:49:43 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
err = soc_tplg_control_load(tplg, kc, &mc->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (err < 0)
|
2021-05-07 07:02:46 +00:00
|
|
|
return err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
static int soc_tplg_dapm_widget_denum_create(struct soc_tplg *tplg, struct snd_kcontrol_new *kc)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_tplg_enum_control *ec;
|
|
|
|
struct soc_enum *se;
|
2021-05-07 07:02:46 +00:00
|
|
|
int err;
|
2016-11-25 08:09:10 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
ec = (struct snd_soc_tplg_enum_control *)tplg->pos;
|
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(ec->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
se = devm_kzalloc(tplg->dev, sizeof(*se), GFP_KERNEL);
|
|
|
|
if (!se)
|
|
|
|
return -ENOMEM;
|
2019-03-02 01:08:52 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
tplg->pos += (sizeof(struct snd_soc_tplg_enum_control) +
|
|
|
|
le32_to_cpu(ec->priv.size));
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
dev_dbg(tplg->dev, " adding DAPM widget enum control %s\n",
|
|
|
|
ec->hdr.name);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
kc->private_value = (long)se;
|
|
|
|
kc->name = devm_kstrdup(tplg->dev, ec->hdr.name, GFP_KERNEL);
|
|
|
|
if (!kc->name)
|
|
|
|
return -ENOMEM;
|
|
|
|
kc->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc->access = le32_to_cpu(ec->hdr.access);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* we only support FL/FR channel mapping atm */
|
2023-01-27 23:11:03 +00:00
|
|
|
se->reg = tplg_chan_get_reg(tplg, ec->channel, SNDRV_CHMAP_FL);
|
|
|
|
se->shift_l = tplg_chan_get_shift(tplg, ec->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FL);
|
2023-01-27 23:11:03 +00:00
|
|
|
se->shift_r = tplg_chan_get_shift(tplg, ec->channel,
|
2021-05-07 07:02:46 +00:00
|
|
|
SNDRV_CHMAP_FR);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
se->items = le32_to_cpu(ec->items);
|
|
|
|
se->mask = le32_to_cpu(ec->mask);
|
|
|
|
se->dobj.index = tplg->index;
|
2016-11-25 08:09:10 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
switch (le32_to_cpu(ec->hdr.ops.info)) {
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM_VALUE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VALUE:
|
|
|
|
err = soc_tplg_denum_create_values(tplg, se, ec);
|
|
|
|
if (err < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: could not create values for %s\n",
|
|
|
|
ec->hdr.name);
|
|
|
|
return err;
|
2016-11-25 08:09:10 +00:00
|
|
|
}
|
2021-05-07 07:02:46 +00:00
|
|
|
fallthrough;
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_DOUBLE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VIRT:
|
|
|
|
err = soc_tplg_denum_create_texts(tplg, se, ec);
|
2015-05-29 18:06:14 +00:00
|
|
|
if (err < 0) {
|
2021-05-07 07:02:46 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: could not create texts for %s\n",
|
2015-05-29 18:06:14 +00:00
|
|
|
ec->hdr.name);
|
2021-05-07 07:02:46 +00:00
|
|
|
return err;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
2021-05-07 07:02:46 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(tplg->dev, "ASoC: invalid enum control type %d for %s\n",
|
|
|
|
ec->hdr.ops.info, ec->hdr.name);
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* map io handlers */
|
|
|
|
err = soc_tplg_kcontrol_bind_io(&ec->hdr, kc, tplg);
|
|
|
|
if (err) {
|
|
|
|
soc_control_err(tplg, &ec->hdr, ec->hdr.name);
|
|
|
|
return err;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
err = soc_tplg_control_load(tplg, kc, &ec->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (err < 0)
|
2021-05-07 07:02:46 +00:00
|
|
|
return err;
|
|
|
|
|
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
static int soc_tplg_dapm_widget_dbytes_create(struct soc_tplg *tplg, struct snd_kcontrol_new *kc)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_tplg_bytes_control *be;
|
2019-06-17 11:36:44 +00:00
|
|
|
struct soc_bytes_ext *sbe;
|
2021-05-07 07:02:46 +00:00
|
|
|
int err;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
be = (struct snd_soc_tplg_bytes_control *)tplg->pos;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* validate kcontrol */
|
|
|
|
if (strnlen(be->hdr.name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
sbe = devm_kzalloc(tplg->dev, sizeof(*sbe), GFP_KERNEL);
|
|
|
|
if (!sbe)
|
|
|
|
return -ENOMEM;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
tplg->pos += (sizeof(struct snd_soc_tplg_bytes_control) +
|
|
|
|
le32_to_cpu(be->priv.size));
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
dev_dbg(tplg->dev,
|
|
|
|
"ASoC: adding bytes kcontrol %s with access 0x%x\n",
|
|
|
|
be->hdr.name, be->hdr.access);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
kc->private_value = (long)sbe;
|
|
|
|
kc->name = devm_kstrdup(tplg->dev, be->hdr.name, GFP_KERNEL);
|
|
|
|
if (!kc->name)
|
|
|
|
return -ENOMEM;
|
|
|
|
kc->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
|
|
|
|
kc->access = le32_to_cpu(be->hdr.access);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
sbe->max = le32_to_cpu(be->max);
|
|
|
|
INIT_LIST_HEAD(&sbe->dobj.list);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* map standard io handlers and check for external handlers */
|
|
|
|
err = soc_tplg_kcontrol_bind_io(&be->hdr, kc, tplg);
|
|
|
|
if (err) {
|
|
|
|
soc_control_err(tplg, &be->hdr, be->hdr.name);
|
|
|
|
return err;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
/* pass control to driver for optional further init */
|
2023-01-27 23:11:07 +00:00
|
|
|
err = soc_tplg_control_load(tplg, kc, &be->hdr);
|
2023-05-19 19:56:07 +00:00
|
|
|
if (err < 0)
|
2021-05-07 07:02:46 +00:00
|
|
|
return err;
|
2019-06-17 11:36:44 +00:00
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_dapm_widget *w)
|
|
|
|
{
|
|
|
|
struct snd_soc_dapm_context *dapm = &tplg->comp->dapm;
|
|
|
|
struct snd_soc_dapm_widget template, *widget;
|
|
|
|
struct snd_soc_tplg_ctl_hdr *control_hdr;
|
|
|
|
struct snd_soc_card *card = tplg->comp->card;
|
2021-05-19 10:07:13 +00:00
|
|
|
unsigned int *kcontrol_type = NULL;
|
2021-05-07 07:02:46 +00:00
|
|
|
struct snd_kcontrol_new *kc;
|
|
|
|
int mixer_count = 0;
|
|
|
|
int bytes_count = 0;
|
|
|
|
int enum_count = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
int ret = 0;
|
2021-05-07 07:02:46 +00:00
|
|
|
int i;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
if (strnlen(w->name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
|
|
|
if (strnlen(w->sname, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) ==
|
|
|
|
SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev, "ASoC: creating DAPM widget %s id %d\n",
|
|
|
|
w->name, w->id);
|
|
|
|
|
|
|
|
memset(&template, 0, sizeof(template));
|
|
|
|
|
|
|
|
/* map user to kernel widget ID */
|
2019-04-04 19:13:57 +00:00
|
|
|
template.id = get_widget_id(le32_to_cpu(w->id));
|
2019-09-25 11:06:24 +00:00
|
|
|
if ((int)template.id < 0)
|
2015-05-29 18:06:14 +00:00
|
|
|
return template.id;
|
|
|
|
|
2017-06-06 14:45:09 +00:00
|
|
|
/* strings are allocated here, but used and freed by the widget */
|
2015-05-29 18:06:14 +00:00
|
|
|
template.name = kstrdup(w->name, GFP_KERNEL);
|
|
|
|
if (!template.name)
|
|
|
|
return -ENOMEM;
|
|
|
|
template.sname = kstrdup(w->sname, GFP_KERNEL);
|
|
|
|
if (!template.sname) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
2019-04-04 19:13:57 +00:00
|
|
|
template.reg = le32_to_cpu(w->reg);
|
|
|
|
template.shift = le32_to_cpu(w->shift);
|
|
|
|
template.mask = le32_to_cpu(w->mask);
|
|
|
|
template.subseq = le32_to_cpu(w->subseq);
|
2015-05-29 18:06:14 +00:00
|
|
|
template.on_val = w->invert ? 0 : 1;
|
|
|
|
template.off_val = w->invert ? 1 : 0;
|
2019-04-04 19:13:57 +00:00
|
|
|
template.ignore_suspend = le32_to_cpu(w->ignore_suspend);
|
|
|
|
template.event_flags = le16_to_cpu(w->event_flags);
|
2015-05-29 18:06:14 +00:00
|
|
|
template.dobj.index = tplg->index;
|
|
|
|
|
|
|
|
tplg->pos +=
|
2019-04-04 19:13:57 +00:00
|
|
|
(sizeof(struct snd_soc_tplg_dapm_widget) +
|
|
|
|
le32_to_cpu(w->priv.size));
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
if (w->num_kcontrols == 0) {
|
|
|
|
template.num_kcontrols = 0;
|
|
|
|
goto widget;
|
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
template.num_kcontrols = le32_to_cpu(w->num_kcontrols);
|
|
|
|
kc = devm_kcalloc(tplg->dev, le32_to_cpu(w->num_kcontrols), sizeof(*kc), GFP_KERNEL);
|
2023-02-07 21:04:28 +00:00
|
|
|
if (!kc) {
|
|
|
|
ret = -ENOMEM;
|
2022-03-31 11:49:57 +00:00
|
|
|
goto hdr_err;
|
2023-02-07 21:04:28 +00:00
|
|
|
}
|
2021-05-07 07:02:46 +00:00
|
|
|
|
|
|
|
kcontrol_type = devm_kcalloc(tplg->dev, le32_to_cpu(w->num_kcontrols), sizeof(unsigned int),
|
|
|
|
GFP_KERNEL);
|
2023-02-07 21:04:28 +00:00
|
|
|
if (!kcontrol_type) {
|
|
|
|
ret = -ENOMEM;
|
2022-03-31 11:49:57 +00:00
|
|
|
goto hdr_err;
|
2023-02-07 21:04:28 +00:00
|
|
|
}
|
2021-05-07 07:02:46 +00:00
|
|
|
|
2021-10-25 18:59:26 +00:00
|
|
|
for (i = 0; i < le32_to_cpu(w->num_kcontrols); i++) {
|
2021-05-07 07:02:46 +00:00
|
|
|
control_hdr = (struct snd_soc_tplg_ctl_hdr *)tplg->pos;
|
|
|
|
switch (le32_to_cpu(control_hdr->ops.info)) {
|
|
|
|
case SND_SOC_TPLG_CTL_VOLSW:
|
|
|
|
case SND_SOC_TPLG_CTL_STROBE:
|
|
|
|
case SND_SOC_TPLG_CTL_VOLSW_SX:
|
|
|
|
case SND_SOC_TPLG_CTL_VOLSW_XR_SX:
|
|
|
|
case SND_SOC_TPLG_CTL_RANGE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_VOLSW:
|
|
|
|
/* volume mixer */
|
|
|
|
kc[i].index = mixer_count;
|
|
|
|
kcontrol_type[i] = SND_SOC_TPLG_TYPE_MIXER;
|
|
|
|
mixer_count++;
|
|
|
|
ret = soc_tplg_dapm_widget_dmixer_create(tplg, &kc[i]);
|
|
|
|
if (ret < 0)
|
|
|
|
goto hdr_err;
|
|
|
|
break;
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM:
|
|
|
|
case SND_SOC_TPLG_CTL_ENUM_VALUE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_DOUBLE:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VIRT:
|
|
|
|
case SND_SOC_TPLG_DAPM_CTL_ENUM_VALUE:
|
|
|
|
/* enumerated mixer */
|
|
|
|
kc[i].index = enum_count;
|
|
|
|
kcontrol_type[i] = SND_SOC_TPLG_TYPE_ENUM;
|
|
|
|
enum_count++;
|
|
|
|
ret = soc_tplg_dapm_widget_denum_create(tplg, &kc[i]);
|
|
|
|
if (ret < 0)
|
|
|
|
goto hdr_err;
|
|
|
|
break;
|
|
|
|
case SND_SOC_TPLG_CTL_BYTES:
|
|
|
|
/* bytes control */
|
|
|
|
kc[i].index = bytes_count;
|
|
|
|
kcontrol_type[i] = SND_SOC_TPLG_TYPE_BYTES;
|
|
|
|
bytes_count++;
|
|
|
|
ret = soc_tplg_dapm_widget_dbytes_create(tplg, &kc[i]);
|
|
|
|
if (ret < 0)
|
|
|
|
goto hdr_err;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(tplg->dev, "ASoC: invalid widget control type %d:%d:%d\n",
|
|
|
|
control_hdr->ops.get, control_hdr->ops.put,
|
|
|
|
le32_to_cpu(control_hdr->ops.info));
|
|
|
|
ret = -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
goto hdr_err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-07 07:02:46 +00:00
|
|
|
template.kcontrol_news = kc;
|
2021-09-02 11:23:01 +00:00
|
|
|
dev_dbg(tplg->dev, "ASoC: template %s with %d/%d/%d (mixer/enum/bytes) control\n",
|
|
|
|
w->name, mixer_count, enum_count, bytes_count);
|
2021-05-07 07:02:46 +00:00
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
widget:
|
|
|
|
ret = soc_tplg_widget_load(tplg, &template, w);
|
|
|
|
if (ret < 0)
|
|
|
|
goto hdr_err;
|
|
|
|
|
|
|
|
/* card dapm mutex is held by the core if we are loading topology
|
|
|
|
* data during sound card init. */
|
2023-01-31 02:01:59 +00:00
|
|
|
if (snd_soc_card_is_instantiated(card))
|
2015-05-29 18:06:14 +00:00
|
|
|
widget = snd_soc_dapm_new_control(dapm, &template);
|
|
|
|
else
|
|
|
|
widget = snd_soc_dapm_new_control_unlocked(dapm, &template);
|
ASoC: dapm: handle probe deferrals
This starts to handle probe deferrals on regulators and clocks
on the ASoC DAPM.
I came to this patch after audio stopped working on Ux500 ages
ago and I finally looked into it to see what is wrong. I had
messages like this in the console since a while back:
ab8500-codec.0: ASoC: Failed to request audioclk: -517
ab8500-codec.0: ASoC: Failed to create DAPM control audioclk
ab8500-codec.0: Failed to create new controls -12
snd-soc-mop500.0: ASoC: failed to instantiate card -12
snd-soc-mop500.0: Error: snd_soc_register_card failed (-12)!
snd-soc-mop500: probe of snd-soc-mop500.0 failed with error -12
Apparently because the widget table for the codec looks like
this (sound/soc/codecs/ab8500-codec.c):
static const struct snd_soc_dapm_widget ab8500_dapm_widgets[] = {
/* Clocks */
SND_SOC_DAPM_CLOCK_SUPPLY("audioclk"),
/* Regulators */
SND_SOC_DAPM_REGULATOR_SUPPLY("V-AUD", 0, 0),
SND_SOC_DAPM_REGULATOR_SUPPLY("V-AMIC1", 0, 0),
SND_SOC_DAPM_REGULATOR_SUPPLY("V-AMIC2", 0, 0),
SND_SOC_DAPM_REGULATOR_SUPPLY("V-DMIC", 0, 0),
So when we call snd_soc_register_codec() and any of these widgets
get a deferred probe we do not get an -EPROBE_DEFER (-517) back as
we should and instead we just fail. Apparently the code assumes
that clocks and regulators must be available at this point and
not defer.
After this patch it rather looks like this:
ab8500-codec.0: Failed to create new controls -517
snd-soc-mop500.0: ASoC: failed to instantiate card -517
snd-soc-mop500.0: Error: snd_soc_register_card failed (-517)!
(...)
abx500-clk.0: registered clocks for ab850x
snd-soc-mop500.0: ab8500-codec-dai.0 <-> ux500-msp-i2s.1 mapping ok
snd-soc-mop500.0: ab8500-codec-dai.1 <-> ux500-msp-i2s.3 mapping ok
I'm pretty happy about the patch as it it, but I'm a bit
uncertain on how to proceed: there are a lot of users of the
external functions snd_soc_dapm_new_control() (111 sites)
and that will now return an occassional error pointer, which
is not handled in the calling sites.
I want an indication from the maintainers whether I should just
go in and augment all these call sites, or if deferred probe
is frowned upon when it leads to this much overhead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-13 09:23:52 +00:00
|
|
|
if (IS_ERR(widget)) {
|
|
|
|
ret = PTR_ERR(widget);
|
2015-05-29 18:06:14 +00:00
|
|
|
goto hdr_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
widget->dobj.type = SND_SOC_DOBJ_WIDGET;
|
2016-11-25 08:09:17 +00:00
|
|
|
widget->dobj.widget.kcontrol_type = kcontrol_type;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
widget->dobj.unload = tplg->ops->widget_unload;
|
2015-05-29 18:06:14 +00:00
|
|
|
widget->dobj.index = tplg->index;
|
|
|
|
list_add(&widget->dobj.list, &tplg->comp->dobj_list);
|
2017-06-09 14:43:23 +00:00
|
|
|
|
|
|
|
ret = soc_tplg_widget_ready(tplg, widget, w);
|
|
|
|
if (ret < 0)
|
|
|
|
goto ready_err;
|
|
|
|
|
2019-01-25 20:06:45 +00:00
|
|
|
kfree(template.sname);
|
|
|
|
kfree(template.name);
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
return 0;
|
|
|
|
|
2017-06-09 14:43:23 +00:00
|
|
|
ready_err:
|
2023-01-27 23:11:05 +00:00
|
|
|
soc_tplg_remove_widget(widget->dapm->component, &widget->dobj, SOC_TPLG_PASS_WIDGET);
|
2017-06-09 14:43:23 +00:00
|
|
|
snd_soc_dapm_free_widget(widget);
|
2015-05-29 18:06:14 +00:00
|
|
|
hdr_err:
|
|
|
|
kfree(template.sname);
|
|
|
|
err:
|
|
|
|
kfree(template.name);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_dapm_widget_elems_load(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2021-08-02 06:00:52 +00:00
|
|
|
int count, i;
|
2019-04-04 19:13:57 +00:00
|
|
|
|
|
|
|
count = le32_to_cpu(hdr->count);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
dev_dbg(tplg->dev, "ASoC: adding %d DAPM widgets\n", count);
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
2021-08-02 06:00:52 +00:00
|
|
|
struct snd_soc_tplg_dapm_widget *widget = (struct snd_soc_tplg_dapm_widget *) tplg->pos;
|
|
|
|
int ret;
|
|
|
|
|
2021-10-15 16:12:54 +00:00
|
|
|
/*
|
|
|
|
* check if widget itself fits within topology file
|
|
|
|
* use sizeof instead of widget->size, as we can't be sure
|
|
|
|
* it is set properly yet (file may end before it is present)
|
|
|
|
*/
|
|
|
|
if (soc_tplg_get_offset(tplg) + sizeof(*widget) >= tplg->fw->size) {
|
|
|
|
dev_err(tplg->dev, "ASoC: invalid widget data size\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* check if widget has proper size */
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(widget->size) != sizeof(*widget)) {
|
2016-04-27 06:52:56 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: invalid widget size\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2021-10-15 16:12:54 +00:00
|
|
|
/* check if widget private data fits within topology file */
|
|
|
|
if (soc_tplg_get_offset(tplg) + le32_to_cpu(widget->priv.size) >= tplg->fw->size) {
|
|
|
|
dev_err(tplg->dev, "ASoC: invalid widget private data size\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
ret = soc_tplg_dapm_widget_create(tplg, widget);
|
2016-04-27 06:52:38 +00:00
|
|
|
if (ret < 0) {
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: failed to load widget %s\n",
|
|
|
|
widget->name);
|
2016-04-27 06:52:38 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_dapm_complete(struct soc_tplg *tplg)
|
|
|
|
{
|
|
|
|
struct snd_soc_card *card = tplg->comp->card;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Card might not have been registered at this point.
|
|
|
|
* If so, just return success.
|
|
|
|
*/
|
2023-01-31 02:01:59 +00:00
|
|
|
if (!snd_soc_card_is_instantiated(card)) {
|
2023-05-19 19:56:09 +00:00
|
|
|
dev_warn(tplg->dev, "ASoC: Parent card not yet available, widget card binding deferred\n");
|
2015-05-29 18:06:14 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = snd_soc_dapm_new_widgets(card);
|
|
|
|
if (ret < 0)
|
2023-05-19 19:56:09 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: failed to create new widgets %d\n", ret);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2023-01-27 23:11:08 +00:00
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
static int set_stream_info(struct soc_tplg *tplg, struct snd_soc_pcm_stream *stream,
|
|
|
|
struct snd_soc_tplg_stream_caps *caps)
|
2016-02-22 08:29:19 +00:00
|
|
|
{
|
2020-10-30 14:54:25 +00:00
|
|
|
stream->stream_name = devm_kstrdup(tplg->dev, caps->name, GFP_KERNEL);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (!stream->stream_name)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
stream->channels_min = le32_to_cpu(caps->channels_min);
|
|
|
|
stream->channels_max = le32_to_cpu(caps->channels_max);
|
|
|
|
stream->rates = le32_to_cpu(caps->rates);
|
|
|
|
stream->rate_min = le32_to_cpu(caps->rate_min);
|
|
|
|
stream->rate_max = le32_to_cpu(caps->rate_max);
|
|
|
|
stream->formats = le64_to_cpu(caps->formats);
|
|
|
|
stream->sig_bits = le32_to_cpu(caps->sig_bits);
|
2020-03-27 20:47:24 +00:00
|
|
|
|
|
|
|
return 0;
|
2016-02-22 08:29:19 +00:00
|
|
|
}
|
|
|
|
|
2016-07-26 06:32:37 +00:00
|
|
|
static void set_dai_flags(struct snd_soc_dai_driver *dai_drv,
|
|
|
|
unsigned int flag_mask, unsigned int flags)
|
|
|
|
{
|
|
|
|
if (flag_mask & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_RATES)
|
2021-01-15 04:52:54 +00:00
|
|
|
dai_drv->symmetric_rate =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_RATES) ? 1 : 0;
|
2016-07-26 06:32:37 +00:00
|
|
|
|
|
|
|
if (flag_mask & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_CHANNELS)
|
|
|
|
dai_drv->symmetric_channels =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_CHANNELS) ?
|
2016-07-26 06:32:37 +00:00
|
|
|
1 : 0;
|
|
|
|
|
|
|
|
if (flag_mask & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_SAMPLEBITS)
|
2021-01-15 04:52:54 +00:00
|
|
|
dai_drv->symmetric_sample_bits =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_SAMPLEBITS) ?
|
2016-07-26 06:32:37 +00:00
|
|
|
1 : 0;
|
|
|
|
}
|
|
|
|
|
2023-08-08 22:58:42 +00:00
|
|
|
static const struct snd_soc_dai_ops tplg_dai_ops = {
|
|
|
|
.compress_new = snd_soc_new_compress,
|
|
|
|
};
|
|
|
|
|
2016-01-15 08:13:28 +00:00
|
|
|
static int soc_tplg_dai_create(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_pcm *pcm)
|
|
|
|
{
|
|
|
|
struct snd_soc_dai_driver *dai_drv;
|
|
|
|
struct snd_soc_pcm_stream *stream;
|
|
|
|
struct snd_soc_tplg_stream_caps *caps;
|
2019-11-05 06:47:14 +00:00
|
|
|
struct snd_soc_dai *dai;
|
|
|
|
struct snd_soc_dapm_context *dapm =
|
|
|
|
snd_soc_component_get_dapm(tplg->comp);
|
2016-01-15 08:13:28 +00:00
|
|
|
int ret;
|
|
|
|
|
2020-10-30 14:54:25 +00:00
|
|
|
dai_drv = devm_kzalloc(tplg->dev, sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
|
2016-01-15 08:13:28 +00:00
|
|
|
if (dai_drv == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2020-03-27 20:47:24 +00:00
|
|
|
if (strlen(pcm->dai_name)) {
|
2020-10-30 14:54:25 +00:00
|
|
|
dai_drv->name = devm_kstrdup(tplg->dev, pcm->dai_name, GFP_KERNEL);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (!dai_drv->name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
2019-04-04 19:13:57 +00:00
|
|
|
dai_drv->id = le32_to_cpu(pcm->dai_id);
|
2016-01-15 08:13:28 +00:00
|
|
|
|
|
|
|
if (pcm->playback) {
|
|
|
|
stream = &dai_drv->playback;
|
|
|
|
caps = &pcm->caps[SND_SOC_TPLG_STREAM_PLAYBACK];
|
2020-10-30 14:54:25 +00:00
|
|
|
ret = set_stream_info(tplg, stream, caps);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto err;
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (pcm->capture) {
|
|
|
|
stream = &dai_drv->capture;
|
|
|
|
caps = &pcm->caps[SND_SOC_TPLG_STREAM_CAPTURE];
|
2020-10-30 14:54:25 +00:00
|
|
|
ret = set_stream_info(tplg, stream, caps);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto err;
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
2018-03-27 13:30:45 +00:00
|
|
|
if (pcm->compress)
|
2023-08-08 22:58:42 +00:00
|
|
|
dai_drv->ops = &tplg_dai_ops;
|
2018-03-27 13:30:45 +00:00
|
|
|
|
2016-01-15 08:13:28 +00:00
|
|
|
/* pass control to component driver for optional further init */
|
2018-06-14 19:50:37 +00:00
|
|
|
ret = soc_tplg_dai_load(tplg, dai_drv, pcm, NULL);
|
2016-01-15 08:13:28 +00:00
|
|
|
if (ret < 0) {
|
2020-10-30 14:54:24 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: DAI loading failed\n");
|
2020-03-27 20:47:24 +00:00
|
|
|
goto err;
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dai_drv->dobj.index = tplg->index;
|
|
|
|
dai_drv->dobj.type = SND_SOC_DOBJ_PCM;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
dai_drv->dobj.unload = tplg->ops->dai_unload;
|
2016-01-15 08:13:28 +00:00
|
|
|
list_add(&dai_drv->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
|
|
|
/* register the DAI to the component */
|
2021-01-20 15:28:42 +00:00
|
|
|
dai = snd_soc_register_dai(tplg->comp, dai_drv, false);
|
2019-11-05 06:47:14 +00:00
|
|
|
if (!dai)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* Create the DAI widgets here */
|
|
|
|
ret = snd_soc_dapm_new_dai_widgets(dapm, dai);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(dai->dev, "Failed to create DAI widgets %d\n", ret);
|
2021-01-20 15:28:42 +00:00
|
|
|
snd_soc_unregister_dai(dai);
|
2019-11-05 06:47:14 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2020-03-27 20:47:24 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
2019-11-05 06:47:14 +00:00
|
|
|
return ret;
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
2016-11-02 17:03:34 +00:00
|
|
|
static void set_link_flags(struct snd_soc_dai_link *link,
|
|
|
|
unsigned int flag_mask, unsigned int flags)
|
|
|
|
{
|
|
|
|
if (flag_mask & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_RATES)
|
2021-01-15 04:52:54 +00:00
|
|
|
link->symmetric_rate =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_RATES) ? 1 : 0;
|
2016-11-02 17:03:34 +00:00
|
|
|
|
|
|
|
if (flag_mask & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_CHANNELS)
|
|
|
|
link->symmetric_channels =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_CHANNELS) ?
|
2016-11-02 17:03:34 +00:00
|
|
|
1 : 0;
|
|
|
|
|
|
|
|
if (flag_mask & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_SAMPLEBITS)
|
2021-01-15 04:52:54 +00:00
|
|
|
link->symmetric_sample_bits =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_SAMPLEBITS) ?
|
2016-11-02 17:03:34 +00:00
|
|
|
1 : 0;
|
2016-11-02 17:05:32 +00:00
|
|
|
|
|
|
|
if (flag_mask & SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP)
|
|
|
|
link->ignore_suspend =
|
2021-02-18 22:19:20 +00:00
|
|
|
(flags & SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP) ?
|
|
|
|
1 : 0;
|
2016-11-02 17:03:34 +00:00
|
|
|
}
|
|
|
|
|
2016-04-19 05:12:50 +00:00
|
|
|
/* create the FE DAI link */
|
2016-11-02 17:04:42 +00:00
|
|
|
static int soc_tplg_fe_link_create(struct soc_tplg *tplg,
|
2016-01-15 08:13:37 +00:00
|
|
|
struct snd_soc_tplg_pcm *pcm)
|
|
|
|
{
|
|
|
|
struct snd_soc_dai_link *link;
|
2019-06-06 04:19:14 +00:00
|
|
|
struct snd_soc_dai_link_component *dlc;
|
2016-01-15 08:13:37 +00:00
|
|
|
int ret;
|
|
|
|
|
2023-03-29 00:21:03 +00:00
|
|
|
/* link + cpu + codec + platform */
|
|
|
|
link = devm_kzalloc(tplg->dev, sizeof(*link) + (3 * sizeof(*dlc)), GFP_KERNEL);
|
2016-01-15 08:13:37 +00:00
|
|
|
if (link == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2019-06-06 04:19:14 +00:00
|
|
|
dlc = (struct snd_soc_dai_link_component *)(link + 1);
|
|
|
|
|
|
|
|
link->cpus = &dlc[0];
|
|
|
|
link->num_cpus = 1;
|
|
|
|
|
2020-01-22 19:07:52 +00:00
|
|
|
link->dobj.index = tplg->index;
|
|
|
|
link->dobj.type = SND_SOC_DOBJ_DAI_LINK;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
link->dobj.unload = tplg->ops->link_unload;
|
2020-01-22 19:07:52 +00:00
|
|
|
|
2016-11-02 17:02:59 +00:00
|
|
|
if (strlen(pcm->pcm_name)) {
|
2020-10-30 14:54:25 +00:00
|
|
|
link->name = devm_kstrdup(tplg->dev, pcm->pcm_name, GFP_KERNEL);
|
|
|
|
link->stream_name = devm_kstrdup(tplg->dev, pcm->pcm_name, GFP_KERNEL);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (!link->name || !link->stream_name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
2016-11-02 17:02:59 +00:00
|
|
|
}
|
2019-04-04 19:13:57 +00:00
|
|
|
link->id = le32_to_cpu(pcm->pcm_id);
|
2016-01-15 08:13:37 +00:00
|
|
|
|
2020-03-27 20:47:24 +00:00
|
|
|
if (strlen(pcm->dai_name)) {
|
2020-10-30 14:54:25 +00:00
|
|
|
link->cpus->dai_name = devm_kstrdup(tplg->dev, pcm->dai_name, GFP_KERNEL);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (!link->cpus->dai_name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
2016-11-02 17:02:59 +00:00
|
|
|
|
2023-03-29 00:21:03 +00:00
|
|
|
/*
|
2023-04-24 02:37:38 +00:00
|
|
|
* Many topology are assuming link has Codec / Platform, and
|
|
|
|
* these might be overwritten at soc_tplg_dai_link_load().
|
2023-09-11 23:52:08 +00:00
|
|
|
* Don't use &snd_soc_dummy_dlc here.
|
2023-03-29 00:21:03 +00:00
|
|
|
*/
|
2023-09-11 23:52:08 +00:00
|
|
|
link->codecs = &dlc[1]; /* Don't use &snd_soc_dummy_dlc here */
|
2023-04-24 02:37:38 +00:00
|
|
|
link->codecs->name = "snd-soc-dummy";
|
|
|
|
link->codecs->dai_name = "snd-soc-dummy-dai";
|
|
|
|
link->num_codecs = 1;
|
|
|
|
|
2023-09-11 23:52:08 +00:00
|
|
|
link->platforms = &dlc[2]; /* Don't use &snd_soc_dummy_dlc here */
|
2023-04-24 02:37:38 +00:00
|
|
|
link->platforms->name = "snd-soc-dummy";
|
|
|
|
link->num_platforms = 1;
|
2023-03-29 00:21:03 +00:00
|
|
|
|
2016-04-19 05:12:50 +00:00
|
|
|
/* enable DPCM */
|
|
|
|
link->dynamic = 1;
|
2022-09-09 01:19:18 +00:00
|
|
|
link->ignore_pmdown_time = 1;
|
2019-04-04 19:13:57 +00:00
|
|
|
link->dpcm_playback = le32_to_cpu(pcm->playback);
|
|
|
|
link->dpcm_capture = le32_to_cpu(pcm->capture);
|
2016-11-02 17:03:34 +00:00
|
|
|
if (pcm->flag_mask)
|
2019-04-04 19:13:57 +00:00
|
|
|
set_link_flags(link,
|
|
|
|
le32_to_cpu(pcm->flag_mask),
|
|
|
|
le32_to_cpu(pcm->flags));
|
2016-04-19 05:12:50 +00:00
|
|
|
|
2016-01-15 08:13:37 +00:00
|
|
|
/* pass control to component driver for optional further init */
|
2018-06-14 19:50:37 +00:00
|
|
|
ret = soc_tplg_dai_link_load(tplg, link, NULL);
|
2016-01-15 08:13:37 +00:00
|
|
|
if (ret < 0) {
|
2020-10-30 14:54:24 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: FE link loading failed\n");
|
2019-12-10 00:39:38 +00:00
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2023-03-27 00:34:26 +00:00
|
|
|
ret = snd_soc_add_pcm_runtimes(tplg->comp->card, link, 1);
|
2019-12-10 00:39:38 +00:00
|
|
|
if (ret < 0) {
|
2023-07-05 12:30:17 +00:00
|
|
|
if (ret != -EPROBE_DEFER)
|
|
|
|
dev_err(tplg->dev, "ASoC: adding FE link failed\n");
|
2019-12-10 00:39:38 +00:00
|
|
|
goto err;
|
2016-01-15 08:13:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
list_add(&link->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
|
|
|
return 0;
|
2019-12-10 00:39:38 +00:00
|
|
|
err:
|
|
|
|
return ret;
|
2016-01-15 08:13:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* create a FE DAI and DAI link from the PCM object */
|
2016-01-15 08:13:28 +00:00
|
|
|
static int soc_tplg_pcm_create(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_pcm *pcm)
|
|
|
|
{
|
2016-01-15 08:13:37 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = soc_tplg_dai_create(tplg, pcm);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2016-11-02 17:04:42 +00:00
|
|
|
return soc_tplg_fe_link_create(tplg, pcm);
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_pcm_elems_load(struct soc_tplg *tplg,
|
2015-05-29 18:06:14 +00:00
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2024-04-03 09:16:28 +00:00
|
|
|
struct snd_soc_tplg_pcm *pcm;
|
2019-04-04 19:13:57 +00:00
|
|
|
int count;
|
|
|
|
int size;
|
2016-12-08 17:31:27 +00:00
|
|
|
int i;
|
2019-12-10 00:39:39 +00:00
|
|
|
int ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
count = le32_to_cpu(hdr->count);
|
|
|
|
|
2016-11-02 17:00:16 +00:00
|
|
|
/* check the element size and count */
|
|
|
|
pcm = (struct snd_soc_tplg_pcm *)tplg->pos;
|
2019-04-04 19:13:57 +00:00
|
|
|
size = le32_to_cpu(pcm->size);
|
2024-04-03 09:16:27 +00:00
|
|
|
if (size > sizeof(struct snd_soc_tplg_pcm)) {
|
2016-11-02 17:00:16 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: invalid size %d for PCM elems\n",
|
2019-04-04 19:13:57 +00:00
|
|
|
size);
|
2016-11-02 17:00:16 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
if (soc_tplg_check_elem_count(tplg,
|
2019-04-04 19:13:57 +00:00
|
|
|
size, count,
|
|
|
|
le32_to_cpu(hdr->payload_size),
|
2022-01-12 17:00:28 +00:00
|
|
|
"PCM DAI"))
|
2015-05-29 18:06:14 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2016-01-15 08:13:28 +00:00
|
|
|
for (i = 0; i < count; i++) {
|
2016-11-02 17:00:16 +00:00
|
|
|
pcm = (struct snd_soc_tplg_pcm *)tplg->pos;
|
2019-04-04 19:13:57 +00:00
|
|
|
size = le32_to_cpu(pcm->size);
|
2016-11-02 17:00:16 +00:00
|
|
|
|
|
|
|
/* check ABI version by size, create a new version of pcm
|
|
|
|
* if abi not match.
|
|
|
|
*/
|
2024-04-03 09:16:27 +00:00
|
|
|
if (size != sizeof(*pcm))
|
|
|
|
return -EINVAL;
|
2016-04-27 06:52:56 +00:00
|
|
|
|
2016-11-02 17:00:16 +00:00
|
|
|
/* create the FE DAIs and DAI links */
|
2024-04-03 09:16:28 +00:00
|
|
|
ret = soc_tplg_pcm_create(tplg, pcm);
|
|
|
|
if (ret < 0)
|
2019-12-10 00:39:39 +00:00
|
|
|
return ret;
|
2016-11-02 17:00:16 +00:00
|
|
|
|
2016-11-02 17:03:34 +00:00
|
|
|
/* offset by version-specific struct size and
|
|
|
|
* real priv data size
|
|
|
|
*/
|
2024-04-03 09:16:28 +00:00
|
|
|
tplg->pos += size + le32_to_cpu(pcm->priv.size);
|
2016-01-15 08:13:28 +00:00
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_dbg(tplg->dev, "ASoC: adding %d PCM DAIs\n", count);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-11-02 17:04:27 +00:00
|
|
|
/**
|
|
|
|
* set_link_hw_format - Set the HW audio format of the physical DAI link.
|
2017-01-12 11:38:15 +00:00
|
|
|
* @link: &snd_soc_dai_link which should be updated
|
2016-11-02 17:04:27 +00:00
|
|
|
* @cfg: physical link configs.
|
|
|
|
*
|
|
|
|
* Topology context contains a list of supported HW formats (configs) and
|
|
|
|
* a default format ID for the physical link. This function will use this
|
|
|
|
* default ID to choose the HW format to set the link's DAI format for init.
|
|
|
|
*/
|
|
|
|
static void set_link_hw_format(struct snd_soc_dai_link *link,
|
|
|
|
struct snd_soc_tplg_link_config *cfg)
|
|
|
|
{
|
|
|
|
struct snd_soc_tplg_hw_config *hw_config;
|
2020-11-12 16:30:57 +00:00
|
|
|
unsigned char bclk_provider, fsync_provider;
|
2016-11-02 17:04:27 +00:00
|
|
|
unsigned char invert_bclk, invert_fsync;
|
|
|
|
int i;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
for (i = 0; i < le32_to_cpu(cfg->num_hw_configs); i++) {
|
2016-11-02 17:04:27 +00:00
|
|
|
hw_config = &cfg->hw_config[i];
|
|
|
|
if (hw_config->id != cfg->default_hw_config_id)
|
|
|
|
continue;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
link->dai_fmt = le32_to_cpu(hw_config->fmt) &
|
|
|
|
SND_SOC_DAIFMT_FORMAT_MASK;
|
2016-11-02 17:04:27 +00:00
|
|
|
|
2018-04-04 04:19:38 +00:00
|
|
|
/* clock gating */
|
2018-04-16 17:56:44 +00:00
|
|
|
switch (hw_config->clock_gated) {
|
|
|
|
case SND_SOC_TPLG_DAI_CLK_GATE_GATED:
|
2018-04-04 04:19:38 +00:00
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_GATED;
|
2018-04-16 17:56:44 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_TPLG_DAI_CLK_GATE_CONT:
|
2018-04-04 04:19:38 +00:00
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_CONT;
|
2018-04-16 17:56:44 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
/* ignore the value */
|
|
|
|
break;
|
|
|
|
}
|
2018-04-04 04:19:38 +00:00
|
|
|
|
2016-11-02 17:04:27 +00:00
|
|
|
/* clock signal polarity */
|
|
|
|
invert_bclk = hw_config->invert_bclk;
|
|
|
|
invert_fsync = hw_config->invert_fsync;
|
|
|
|
if (!invert_bclk && !invert_fsync)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_NB_NF;
|
|
|
|
else if (!invert_bclk && invert_fsync)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_NB_IF;
|
|
|
|
else if (invert_bclk && !invert_fsync)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_IB_NF;
|
|
|
|
else
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_IB_IF;
|
|
|
|
|
|
|
|
/* clock masters */
|
2020-11-12 16:30:57 +00:00
|
|
|
bclk_provider = (hw_config->bclk_provider ==
|
|
|
|
SND_SOC_TPLG_BCLK_CP);
|
|
|
|
fsync_provider = (hw_config->fsync_provider ==
|
|
|
|
SND_SOC_TPLG_FSYNC_CP);
|
|
|
|
if (bclk_provider && fsync_provider)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP;
|
|
|
|
else if (!bclk_provider && fsync_provider)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFP;
|
|
|
|
else if (bclk_provider && !fsync_provider)
|
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFC;
|
2016-11-02 17:04:27 +00:00
|
|
|
else
|
2020-11-12 16:30:57 +00:00
|
|
|
link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFC;
|
2016-11-02 17:04:27 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-12-10 00:34:14 +00:00
|
|
|
/**
|
|
|
|
* snd_soc_find_dai_link - Find a DAI link
|
|
|
|
*
|
|
|
|
* @card: soc card
|
|
|
|
* @id: DAI link ID to match
|
|
|
|
* @name: DAI link name to match, optional
|
|
|
|
* @stream_name: DAI link stream name to match, optional
|
|
|
|
*
|
|
|
|
* This function will search all existing DAI links of the soc card to
|
|
|
|
* find the link of the same ID. Since DAI links may not have their
|
|
|
|
* unique ID, so name and stream name should also match if being
|
|
|
|
* specified.
|
|
|
|
*
|
|
|
|
* Return: pointer of DAI link, or NULL if not found.
|
|
|
|
*/
|
|
|
|
static struct snd_soc_dai_link *snd_soc_find_dai_link(struct snd_soc_card *card,
|
|
|
|
int id, const char *name,
|
|
|
|
const char *stream_name)
|
|
|
|
{
|
|
|
|
struct snd_soc_pcm_runtime *rtd;
|
|
|
|
|
|
|
|
for_each_card_rtds(card, rtd) {
|
2021-08-02 06:01:12 +00:00
|
|
|
struct snd_soc_dai_link *link = rtd->dai_link;
|
2019-12-10 00:34:14 +00:00
|
|
|
|
|
|
|
if (link->id != id)
|
|
|
|
continue;
|
|
|
|
|
2023-05-26 20:41:47 +00:00
|
|
|
if (name && (!link->name || !strstr(link->name, name)))
|
2019-12-10 00:34:14 +00:00
|
|
|
continue;
|
|
|
|
|
2023-05-26 20:41:47 +00:00
|
|
|
if (stream_name && (!link->stream_name ||
|
|
|
|
!strstr(link->stream_name, stream_name)))
|
2019-12-10 00:34:14 +00:00
|
|
|
continue;
|
|
|
|
|
|
|
|
return link;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2016-11-02 17:04:27 +00:00
|
|
|
/* Find and configure an existing physical DAI link */
|
|
|
|
static int soc_tplg_link_config(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_link_config *cfg)
|
|
|
|
{
|
|
|
|
struct snd_soc_dai_link *link;
|
|
|
|
const char *name, *stream_name;
|
2016-11-05 00:42:14 +00:00
|
|
|
size_t len;
|
2016-11-02 17:04:27 +00:00
|
|
|
int ret;
|
|
|
|
|
2016-11-05 00:42:14 +00:00
|
|
|
len = strnlen(cfg->name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN);
|
|
|
|
if (len == SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
|
|
|
else if (len)
|
|
|
|
name = cfg->name;
|
|
|
|
else
|
|
|
|
name = NULL;
|
|
|
|
|
|
|
|
len = strnlen(cfg->stream_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN);
|
|
|
|
if (len == SNDRV_CTL_ELEM_ID_NAME_MAXLEN)
|
|
|
|
return -EINVAL;
|
|
|
|
else if (len)
|
|
|
|
stream_name = cfg->stream_name;
|
|
|
|
else
|
|
|
|
stream_name = NULL;
|
2016-11-02 17:04:27 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
link = snd_soc_find_dai_link(tplg->comp->card, le32_to_cpu(cfg->id),
|
2016-11-02 17:04:27 +00:00
|
|
|
name, stream_name);
|
|
|
|
if (!link) {
|
|
|
|
dev_err(tplg->dev, "ASoC: physical link %s (id %d) not exist\n",
|
|
|
|
name, cfg->id);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* hw format */
|
|
|
|
if (cfg->num_hw_configs)
|
|
|
|
set_link_hw_format(link, cfg);
|
|
|
|
|
|
|
|
/* flags */
|
|
|
|
if (cfg->flag_mask)
|
2019-04-04 19:13:57 +00:00
|
|
|
set_link_flags(link,
|
|
|
|
le32_to_cpu(cfg->flag_mask),
|
|
|
|
le32_to_cpu(cfg->flags));
|
2016-11-02 17:04:27 +00:00
|
|
|
|
|
|
|
/* pass control to component driver for optional further init */
|
2018-06-14 19:50:37 +00:00
|
|
|
ret = soc_tplg_dai_link_load(tplg, link, cfg);
|
2016-11-02 17:04:27 +00:00
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: physical link loading failed\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-02-01 17:07:40 +00:00
|
|
|
/* for unloading it in snd_soc_tplg_component_remove */
|
|
|
|
link->dobj.index = tplg->index;
|
|
|
|
link->dobj.type = SND_SOC_DOBJ_BACKEND_LINK;
|
2023-01-27 23:11:11 +00:00
|
|
|
if (tplg->ops)
|
|
|
|
link->dobj.unload = tplg->ops->link_unload;
|
2019-02-01 17:07:40 +00:00
|
|
|
list_add(&link->dobj.list, &tplg->comp->dobj_list);
|
|
|
|
|
2016-11-02 17:04:27 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Load physical link config elements from the topology context */
|
|
|
|
static int soc_tplg_link_elems_load(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2024-04-03 09:16:28 +00:00
|
|
|
struct snd_soc_tplg_link_config *link;
|
2019-04-04 19:13:57 +00:00
|
|
|
int count;
|
|
|
|
int size;
|
2016-11-02 17:04:27 +00:00
|
|
|
int i, ret;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
count = le32_to_cpu(hdr->count);
|
|
|
|
|
2016-11-02 17:04:27 +00:00
|
|
|
/* check the element size and count */
|
|
|
|
link = (struct snd_soc_tplg_link_config *)tplg->pos;
|
2019-04-04 19:13:57 +00:00
|
|
|
size = le32_to_cpu(link->size);
|
2024-04-03 09:16:27 +00:00
|
|
|
if (size > sizeof(struct snd_soc_tplg_link_config)) {
|
2016-11-02 17:04:27 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: invalid size %d for physical link elems\n",
|
2019-04-04 19:13:57 +00:00
|
|
|
size);
|
2016-11-02 17:04:27 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2022-01-12 17:00:28 +00:00
|
|
|
if (soc_tplg_check_elem_count(tplg, size, count,
|
2019-04-04 19:13:57 +00:00
|
|
|
le32_to_cpu(hdr->payload_size),
|
2022-01-12 17:00:28 +00:00
|
|
|
"physical link config"))
|
2016-11-02 17:04:27 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* config physical DAI links */
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
link = (struct snd_soc_tplg_link_config *)tplg->pos;
|
2019-04-04 19:13:57 +00:00
|
|
|
size = le32_to_cpu(link->size);
|
2024-04-03 09:16:27 +00:00
|
|
|
if (size != sizeof(*link))
|
|
|
|
return -EINVAL;
|
2016-11-02 17:04:27 +00:00
|
|
|
|
2024-04-03 09:16:28 +00:00
|
|
|
ret = soc_tplg_link_config(tplg, link);
|
|
|
|
if (ret < 0)
|
2016-11-02 17:04:27 +00:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* offset by version-specific struct size and
|
|
|
|
* real priv data size
|
|
|
|
*/
|
2024-04-03 09:16:28 +00:00
|
|
|
tplg->pos += size + le32_to_cpu(link->priv.size);
|
2016-11-02 17:04:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
/**
|
|
|
|
* soc_tplg_dai_config - Find and configure an existing physical DAI.
|
2016-07-26 06:32:37 +00:00
|
|
|
* @tplg: topology context
|
2016-11-02 17:05:15 +00:00
|
|
|
* @d: physical DAI configs.
|
2016-07-26 06:32:37 +00:00
|
|
|
*
|
2016-11-02 17:05:15 +00:00
|
|
|
* The physical dai should already be registered by the platform driver.
|
|
|
|
* The platform driver should specify the DAI name and ID for matching.
|
2016-07-26 06:32:37 +00:00
|
|
|
*/
|
2016-11-02 17:05:15 +00:00
|
|
|
static int soc_tplg_dai_config(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_dai *d)
|
2016-07-26 06:32:37 +00:00
|
|
|
{
|
2019-04-04 19:13:57 +00:00
|
|
|
struct snd_soc_dai_link_component dai_component;
|
2016-07-26 06:32:37 +00:00
|
|
|
struct snd_soc_dai *dai;
|
|
|
|
struct snd_soc_dai_driver *dai_drv;
|
|
|
|
struct snd_soc_pcm_stream *stream;
|
|
|
|
struct snd_soc_tplg_stream_caps *caps;
|
|
|
|
int ret;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
memset(&dai_component, 0, sizeof(dai_component));
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
dai_component.dai_name = d->dai_name;
|
2016-07-26 06:32:37 +00:00
|
|
|
dai = snd_soc_find_dai(&dai_component);
|
|
|
|
if (!dai) {
|
2016-11-02 17:05:15 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: physical DAI %s not registered\n",
|
|
|
|
d->dai_name);
|
2016-07-26 06:32:37 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(d->dai_id) != dai->id) {
|
2016-11-02 17:05:15 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: physical DAI %s id mismatch\n",
|
|
|
|
d->dai_name);
|
2016-07-26 06:32:37 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dai_drv = dai->driver;
|
|
|
|
if (!dai_drv)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
if (d->playback) {
|
2016-07-26 06:32:37 +00:00
|
|
|
stream = &dai_drv->playback;
|
2016-11-02 17:05:15 +00:00
|
|
|
caps = &d->caps[SND_SOC_TPLG_STREAM_PLAYBACK];
|
2020-10-30 14:54:25 +00:00
|
|
|
ret = set_stream_info(tplg, stream, caps);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto err;
|
2016-07-26 06:32:37 +00:00
|
|
|
}
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
if (d->capture) {
|
2016-07-26 06:32:37 +00:00
|
|
|
stream = &dai_drv->capture;
|
2016-11-02 17:05:15 +00:00
|
|
|
caps = &d->caps[SND_SOC_TPLG_STREAM_CAPTURE];
|
2020-10-30 14:54:25 +00:00
|
|
|
ret = set_stream_info(tplg, stream, caps);
|
2020-03-27 20:47:24 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto err;
|
2016-07-26 06:32:37 +00:00
|
|
|
}
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
if (d->flag_mask)
|
2019-04-04 19:13:57 +00:00
|
|
|
set_dai_flags(dai_drv,
|
|
|
|
le32_to_cpu(d->flag_mask),
|
|
|
|
le32_to_cpu(d->flags));
|
2016-07-26 06:32:37 +00:00
|
|
|
|
|
|
|
/* pass control to component driver for optional further init */
|
2018-06-14 19:50:37 +00:00
|
|
|
ret = soc_tplg_dai_load(tplg, dai_drv, NULL, dai);
|
2016-07-26 06:32:37 +00:00
|
|
|
if (ret < 0) {
|
2020-10-30 14:54:24 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: DAI loading failed\n");
|
2020-03-27 20:47:24 +00:00
|
|
|
goto err;
|
2016-07-26 06:32:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2020-03-27 20:47:24 +00:00
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
2016-07-26 06:32:37 +00:00
|
|
|
}
|
|
|
|
|
2016-11-02 17:05:15 +00:00
|
|
|
/* load physical DAI elements */
|
|
|
|
static int soc_tplg_dai_elems_load(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
2016-07-26 06:32:37 +00:00
|
|
|
{
|
2019-04-04 19:13:57 +00:00
|
|
|
int count;
|
2021-08-02 06:00:42 +00:00
|
|
|
int i;
|
2016-07-26 06:32:37 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
count = le32_to_cpu(hdr->count);
|
|
|
|
|
2016-07-26 06:32:37 +00:00
|
|
|
/* config the existing BE DAIs */
|
|
|
|
for (i = 0; i < count; i++) {
|
2021-08-02 06:00:42 +00:00
|
|
|
struct snd_soc_tplg_dai *dai = (struct snd_soc_tplg_dai *)tplg->pos;
|
|
|
|
int ret;
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(dai->size) != sizeof(*dai)) {
|
2016-11-02 17:05:15 +00:00
|
|
|
dev_err(tplg->dev, "ASoC: invalid physical DAI size\n");
|
2016-07-26 06:32:37 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2020-03-27 20:47:29 +00:00
|
|
|
ret = soc_tplg_dai_config(tplg, dai);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: failed to configure DAI\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
tplg->pos += (sizeof(*dai) + le32_to_cpu(dai->priv.size));
|
2016-07-26 06:32:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(tplg->dev, "ASoC: Configure %d BE DAIs\n", count);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
static int soc_tplg_manifest_load(struct soc_tplg *tplg,
|
2016-07-26 06:32:37 +00:00
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
2024-04-03 09:16:28 +00:00
|
|
|
struct snd_soc_tplg_manifest *manifest;
|
2020-02-07 18:53:25 +00:00
|
|
|
int ret = 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
manifest = (struct snd_soc_tplg_manifest *)tplg->pos;
|
2016-04-27 06:52:56 +00:00
|
|
|
|
2016-10-11 06:36:42 +00:00
|
|
|
/* check ABI version by size, create a new manifest if abi not match */
|
2024-04-03 09:16:27 +00:00
|
|
|
if (le32_to_cpu(manifest->size) != sizeof(*manifest))
|
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2016-10-11 06:36:42 +00:00
|
|
|
/* pass control to component driver for optional further init */
|
2020-03-12 12:22:39 +00:00
|
|
|
if (tplg->ops && tplg->ops->manifest)
|
2024-04-03 09:16:28 +00:00
|
|
|
ret = tplg->ops->manifest(tplg->comp, tplg->index, manifest);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2020-02-07 18:53:25 +00:00
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* validate header magic, size and type */
|
2023-01-27 23:11:04 +00:00
|
|
|
static int soc_tplg_valid_header(struct soc_tplg *tplg,
|
2015-05-29 18:06:14 +00:00
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(hdr->size) != sizeof(*hdr)) {
|
2016-04-27 06:52:56 +00:00
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: invalid header size for type %d at offset 0x%lx size 0x%zx.\n",
|
2019-04-04 19:13:57 +00:00
|
|
|
le32_to_cpu(hdr->type), soc_tplg_get_hdr_offset(tplg),
|
2016-04-27 06:52:56 +00:00
|
|
|
tplg->fw->size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2023-01-27 23:11:01 +00:00
|
|
|
if (soc_tplg_get_hdr_offset(tplg) + le32_to_cpu(hdr->payload_size) >= tplg->fw->size) {
|
2021-10-15 16:12:53 +00:00
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: invalid header of type %d at offset %ld payload_size %d\n",
|
|
|
|
le32_to_cpu(hdr->type), soc_tplg_get_hdr_offset(tplg),
|
|
|
|
hdr->payload_size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
/* big endian firmware objects not supported atm */
|
2020-04-15 16:24:35 +00:00
|
|
|
if (le32_to_cpu(hdr->magic) == SOC_TPLG_MAGIC_BIG_ENDIAN) {
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: pass %d big endian not supported header got %x at offset 0x%lx size 0x%zx.\n",
|
|
|
|
tplg->pass, hdr->magic,
|
|
|
|
soc_tplg_get_hdr_offset(tplg), tplg->fw->size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(hdr->magic) != SND_SOC_TPLG_MAGIC) {
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: pass %d does not have a valid header got %x at offset 0x%lx size 0x%zx.\n",
|
|
|
|
tplg->pass, hdr->magic,
|
|
|
|
soc_tplg_get_hdr_offset(tplg), tplg->fw->size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-11-02 17:03:17 +00:00
|
|
|
/* Support ABI from version 4 */
|
2019-04-04 19:13:57 +00:00
|
|
|
if (le32_to_cpu(hdr->abi) > SND_SOC_TPLG_ABI_VERSION ||
|
|
|
|
le32_to_cpu(hdr->abi) < SND_SOC_TPLG_ABI_VERSION_MIN) {
|
2015-05-29 18:06:14 +00:00
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: pass %d invalid ABI version got 0x%x need 0x%x at offset 0x%lx size 0x%zx.\n",
|
|
|
|
tplg->pass, hdr->abi,
|
|
|
|
SND_SOC_TPLG_ABI_VERSION, soc_tplg_get_hdr_offset(tplg),
|
|
|
|
tplg->fw->size);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (hdr->payload_size == 0) {
|
|
|
|
dev_err(tplg->dev, "ASoC: header has 0 size at offset 0x%lx.\n",
|
|
|
|
soc_tplg_get_hdr_offset(tplg));
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2023-01-27 23:11:09 +00:00
|
|
|
return 0;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* check header type and call appropriate handler */
|
|
|
|
static int soc_tplg_load_header(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr)
|
|
|
|
{
|
2020-05-27 02:28:00 +00:00
|
|
|
int (*elem_load)(struct soc_tplg *tplg,
|
|
|
|
struct snd_soc_tplg_hdr *hdr);
|
|
|
|
unsigned int hdr_pass;
|
|
|
|
|
2015-05-29 18:06:14 +00:00
|
|
|
tplg->pos = tplg->hdr_pos + sizeof(struct snd_soc_tplg_hdr);
|
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
tplg->index = le32_to_cpu(hdr->index);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-04-04 19:13:57 +00:00
|
|
|
switch (le32_to_cpu(hdr->type)) {
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_MIXER:
|
|
|
|
case SND_SOC_TPLG_TYPE_ENUM:
|
|
|
|
case SND_SOC_TPLG_TYPE_BYTES:
|
2022-04-01 12:01:58 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_CONTROL;
|
2020-05-27 02:28:00 +00:00
|
|
|
elem_load = soc_tplg_kcontrol_elems_load;
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_DAPM_GRAPH:
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_GRAPH;
|
|
|
|
elem_load = soc_tplg_dapm_graph_elems_load;
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_DAPM_WIDGET:
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_WIDGET;
|
|
|
|
elem_load = soc_tplg_dapm_widget_elems_load;
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_PCM:
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_PCM_DAI;
|
|
|
|
elem_load = soc_tplg_pcm_elems_load;
|
|
|
|
break;
|
2016-11-02 17:05:01 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_DAI:
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_BE_DAI;
|
|
|
|
elem_load = soc_tplg_dai_elems_load;
|
|
|
|
break;
|
2016-11-02 17:04:27 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_DAI_LINK:
|
|
|
|
case SND_SOC_TPLG_TYPE_BACKEND_LINK:
|
|
|
|
/* physical link configurations */
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_LINK;
|
|
|
|
elem_load = soc_tplg_link_elems_load;
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_TPLG_TYPE_MANIFEST:
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_MANIFEST;
|
|
|
|
elem_load = soc_tplg_manifest_load;
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
default:
|
|
|
|
/* bespoke vendor data object */
|
2020-05-27 02:28:00 +00:00
|
|
|
hdr_pass = SOC_TPLG_PASS_VENDOR;
|
|
|
|
elem_load = soc_tplg_vendor_load;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tplg->pass == hdr_pass) {
|
|
|
|
dev_dbg(tplg->dev,
|
|
|
|
"ASoC: Got 0x%x bytes of type %d version %d vendor %d at pass %d\n",
|
|
|
|
hdr->payload_size, hdr->type, hdr->version,
|
|
|
|
hdr->vendor_type, tplg->pass);
|
|
|
|
return elem_load(tplg, hdr);
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* process the topology file headers */
|
|
|
|
static int soc_tplg_process_headers(struct soc_tplg *tplg)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* process the header types from start to end */
|
2022-04-01 12:01:55 +00:00
|
|
|
for (tplg->pass = SOC_TPLG_PASS_START; tplg->pass <= SOC_TPLG_PASS_END; tplg->pass++) {
|
2021-08-02 06:00:27 +00:00
|
|
|
struct snd_soc_tplg_hdr *hdr;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
tplg->hdr_pos = tplg->fw->data;
|
|
|
|
hdr = (struct snd_soc_tplg_hdr *)tplg->hdr_pos;
|
|
|
|
|
|
|
|
while (!soc_tplg_is_eof(tplg)) {
|
|
|
|
|
|
|
|
/* make sure header is valid before loading */
|
2023-01-27 23:11:04 +00:00
|
|
|
ret = soc_tplg_valid_header(tplg, hdr);
|
2023-05-19 19:56:11 +00:00
|
|
|
if (ret < 0)
|
2015-05-29 18:06:14 +00:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* load the header object */
|
|
|
|
ret = soc_tplg_load_header(tplg, hdr);
|
2020-07-07 20:37:49 +00:00
|
|
|
if (ret < 0) {
|
2023-07-05 12:30:17 +00:00
|
|
|
if (ret != -EPROBE_DEFER) {
|
|
|
|
dev_err(tplg->dev,
|
|
|
|
"ASoC: topology: could not load header: %d\n",
|
|
|
|
ret);
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
return ret;
|
2020-07-07 20:37:49 +00:00
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
/* goto next header */
|
2019-04-04 19:13:57 +00:00
|
|
|
tplg->hdr_pos += le32_to_cpu(hdr->payload_size) +
|
2015-05-29 18:06:14 +00:00
|
|
|
sizeof(struct snd_soc_tplg_hdr);
|
|
|
|
hdr = (struct snd_soc_tplg_hdr *)tplg->hdr_pos;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/* signal DAPM we are complete */
|
|
|
|
ret = soc_tplg_dapm_complete(tplg);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int soc_tplg_load(struct soc_tplg *tplg)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = soc_tplg_process_headers(tplg);
|
|
|
|
if (ret == 0)
|
2021-09-27 12:05:06 +00:00
|
|
|
return soc_tplg_complete(tplg);
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* load audio component topology from "firmware" file */
|
|
|
|
int snd_soc_tplg_component_load(struct snd_soc_component *comp,
|
2020-10-30 14:54:23 +00:00
|
|
|
struct snd_soc_tplg_ops *ops, const struct firmware *fw)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct soc_tplg tplg;
|
2019-02-17 13:23:47 +00:00
|
|
|
int ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2021-01-14 16:36:01 +00:00
|
|
|
/*
|
|
|
|
* check if we have sane parameters:
|
|
|
|
* comp - needs to exist to keep and reference data while parsing
|
|
|
|
* comp->card - used for setting card related parameters
|
2021-10-15 16:12:56 +00:00
|
|
|
* comp->card->dev - used for resource management and prints
|
2021-01-14 16:36:01 +00:00
|
|
|
* fw - we need it, as it is the very thing we parse
|
|
|
|
*/
|
2021-10-15 16:12:56 +00:00
|
|
|
if (!comp || !comp->card || !comp->card->dev || !fw)
|
2020-03-12 12:22:39 +00:00
|
|
|
return -EINVAL;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
/* setup parsing context */
|
|
|
|
memset(&tplg, 0, sizeof(tplg));
|
|
|
|
tplg.fw = fw;
|
2021-10-15 16:12:56 +00:00
|
|
|
tplg.dev = comp->card->dev;
|
2015-05-29 18:06:14 +00:00
|
|
|
tplg.comp = comp;
|
2021-01-14 16:36:02 +00:00
|
|
|
if (ops) {
|
|
|
|
tplg.ops = ops;
|
|
|
|
tplg.io_ops = ops->io_ops;
|
|
|
|
tplg.io_ops_count = ops->io_ops_count;
|
|
|
|
tplg.bytes_ext_ops = ops->bytes_ext_ops;
|
|
|
|
tplg.bytes_ext_ops_count = ops->bytes_ext_ops_count;
|
|
|
|
}
|
2015-05-29 18:06:14 +00:00
|
|
|
|
2019-02-17 13:23:47 +00:00
|
|
|
ret = soc_tplg_load(&tplg);
|
|
|
|
/* free the created components if fail to load topology */
|
|
|
|
if (ret)
|
2020-10-30 14:54:23 +00:00
|
|
|
snd_soc_tplg_component_remove(comp);
|
2019-02-17 13:23:47 +00:00
|
|
|
|
|
|
|
return ret;
|
2015-05-29 18:06:14 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_soc_tplg_component_load);
|
|
|
|
|
|
|
|
/* remove dynamic controls from the component driver */
|
2020-10-30 14:54:23 +00:00
|
|
|
int snd_soc_tplg_component_remove(struct snd_soc_component *comp)
|
2015-05-29 18:06:14 +00:00
|
|
|
{
|
|
|
|
struct snd_soc_dobj *dobj, *next_dobj;
|
2022-04-01 12:01:55 +00:00
|
|
|
int pass;
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
/* process the header types from end to start */
|
2022-04-01 12:01:55 +00:00
|
|
|
for (pass = SOC_TPLG_PASS_END; pass >= SOC_TPLG_PASS_START; pass--) {
|
2015-05-29 18:06:14 +00:00
|
|
|
|
|
|
|
/* remove mixer controls */
|
|
|
|
list_for_each_entry_safe(dobj, next_dobj, &comp->dobj_list,
|
|
|
|
list) {
|
|
|
|
|
|
|
|
switch (dobj->type) {
|
|
|
|
case SND_SOC_DOBJ_BYTES:
|
2023-01-27 23:11:10 +00:00
|
|
|
case SND_SOC_DOBJ_ENUM:
|
|
|
|
case SND_SOC_DOBJ_MIXER:
|
|
|
|
soc_tplg_remove_kcontrol(comp, dobj, pass);
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
2019-01-25 20:06:47 +00:00
|
|
|
case SND_SOC_DOBJ_GRAPH:
|
2023-01-27 23:11:05 +00:00
|
|
|
soc_tplg_remove_route(comp, dobj, pass);
|
2019-01-25 20:06:47 +00:00
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
case SND_SOC_DOBJ_WIDGET:
|
2023-01-27 23:11:05 +00:00
|
|
|
soc_tplg_remove_widget(comp, dobj, pass);
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
|
|
|
case SND_SOC_DOBJ_PCM:
|
2023-01-27 23:11:05 +00:00
|
|
|
soc_tplg_remove_dai(comp, dobj, pass);
|
2015-05-29 18:06:14 +00:00
|
|
|
break;
|
2016-01-15 08:13:37 +00:00
|
|
|
case SND_SOC_DOBJ_DAI_LINK:
|
2023-01-27 23:11:05 +00:00
|
|
|
soc_tplg_remove_link(comp, dobj, pass);
|
2016-01-15 08:13:37 +00:00
|
|
|
break;
|
2019-02-01 17:07:40 +00:00
|
|
|
case SND_SOC_DOBJ_BACKEND_LINK:
|
|
|
|
/*
|
|
|
|
* call link_unload ops if extra
|
|
|
|
* deinitialization is needed.
|
|
|
|
*/
|
|
|
|
remove_backend_link(comp, dobj, pass);
|
|
|
|
break;
|
2015-05-29 18:06:14 +00:00
|
|
|
default:
|
|
|
|
dev_err(comp->dev, "ASoC: invalid component type %d for removal\n",
|
|
|
|
dobj->type);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* let caller know if FW can be freed when no objects are left */
|
|
|
|
return !list_empty(&comp->dobj_list);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_soc_tplg_component_remove);
|