2024-06-27 15:00:29 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// Author: Kevin Wells <kevin.wells@nxp.com>
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//
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// Copyright (C) 2008 NXP Semiconductors
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// Copyright 2023 Timesys Corporation <piotr.wojtaszczyk@timesys.com>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/dma-mapping.h>
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#include <linux/amba/pl08x.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/soc.h>
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#include "lpc3xxx-i2s.h"
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#define STUB_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_U8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_U16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_U24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE | \
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SNDRV_PCM_FMTBIT_U32_LE | \
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SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)
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static const struct snd_pcm_hardware lpc3xxx_pcm_hardware = {
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.info = (SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_RESUME),
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.formats = STUB_FORMATS,
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.period_bytes_min = 128,
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.period_bytes_max = 2048,
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.periods_min = 2,
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.periods_max = 1024,
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.buffer_bytes_max = 128 * 1024
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};
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static const struct snd_dmaengine_pcm_config lpc3xxx_dmaengine_pcm_config = {
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.pcm_hardware = &lpc3xxx_pcm_hardware,
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.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
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.compat_filter_fn = pl08x_filter_id,
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.prealloc_buffer_size = 128 * 1024,
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};
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2024-08-02 10:10:44 +00:00
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static const struct snd_soc_component_driver lpc3xxx_soc_platform_driver = {
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2024-06-27 15:00:29 +00:00
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.name = "lpc32xx-pcm",
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};
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int lpc3xxx_pcm_register(struct platform_device *pdev)
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{
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int ret;
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev, &lpc3xxx_dmaengine_pcm_config, 0);
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if (ret) {
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dev_err(&pdev->dev, "failed to register dmaengine: %d\n", ret);
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return ret;
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}
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return devm_snd_soc_register_component(&pdev->dev, &lpc3xxx_soc_platform_driver,
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NULL, 0);
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}
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EXPORT_SYMBOL(lpc3xxx_pcm_register);
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