License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2015-02-17 20:46:37 +00:00
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/*
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* HD-audio core stuff
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*/
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#ifndef __SOUND_HDAUDIO_H
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#define __SOUND_HDAUDIO_H
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#include <linux/device.h>
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2015-04-14 10:15:47 +00:00
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#include <linux/interrupt.h>
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ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
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#include <linux/io.h>
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2022-03-11 15:35:28 +00:00
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#include <linux/io-64-nonatomic-lo-hi.h>
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2022-08-18 14:15:14 +00:00
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#include <linux/iopoll.h>
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2023-07-17 11:45:01 +00:00
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#include <linux/pci.h>
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2018-06-27 07:03:51 +00:00
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#include <linux/pm_runtime.h>
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2015-04-14 10:15:47 +00:00
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#include <linux/timecounter.h>
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#include <sound/core.h>
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2018-07-25 21:19:36 +00:00
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#include <sound/pcm.h>
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2015-04-14 10:15:47 +00:00
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#include <sound/memalloc.h>
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2015-03-02 22:22:59 +00:00
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#include <sound/hda_verbs.h>
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2024-05-30 13:19:04 +00:00
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#include <drm/intel/i915_component.h>
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2015-03-02 22:22:59 +00:00
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2015-03-03 09:07:24 +00:00
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/* codec node id */
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typedef u16 hda_nid_t;
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2015-03-02 22:22:59 +00:00
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struct hdac_bus;
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2015-04-14 10:15:47 +00:00
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struct hdac_stream;
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2015-03-02 22:22:59 +00:00
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struct hdac_device;
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struct hdac_driver;
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 13:59:42 +00:00
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struct hdac_widget_tree;
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2015-09-29 08:26:10 +00:00
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struct hda_device_id;
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2015-02-17 20:46:37 +00:00
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/*
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* exported bus type
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*/
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2023-12-19 13:34:46 +00:00
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extern const struct bus_type snd_hda_bus_type;
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2015-02-17 20:46:37 +00:00
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2015-03-03 16:33:10 +00:00
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/*
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* generic arrays
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*/
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struct snd_array {
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unsigned int used;
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unsigned int alloced;
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unsigned int elem_size;
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unsigned int alloc_align;
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void *list;
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};
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2015-02-17 20:46:37 +00:00
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/*
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* HD-audio codec base device
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*/
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struct hdac_device {
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struct device dev;
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int type;
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2015-03-02 22:22:59 +00:00
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struct hdac_bus *bus;
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unsigned int addr; /* codec address */
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struct list_head list; /* list point for bus codec_list */
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2015-03-03 09:07:24 +00:00
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hda_nid_t afg; /* AFG node id */
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hda_nid_t mfg; /* MFG node id */
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/* ids */
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unsigned int vendor_id;
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unsigned int subsystem_id;
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unsigned int revision_id;
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unsigned int afg_function_id;
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unsigned int mfg_function_id;
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unsigned int afg_unsol:1;
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unsigned int mfg_unsol:1;
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unsigned int power_caps; /* FG power caps */
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const char *vendor_name; /* codec vendor name */
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const char *chip_name; /* codec chip name */
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2015-03-03 14:40:08 +00:00
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/* verb exec op override */
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int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
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unsigned int flags, unsigned int *res);
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2015-03-03 09:07:24 +00:00
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/* widgets */
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unsigned int num_nodes;
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hda_nid_t start_nid, end_nid;
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/* misc flags */
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atomic_t in_pm; /* suspend/resume being performed */
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 13:59:42 +00:00
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/* sysfs */
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2019-05-13 09:18:01 +00:00
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struct mutex widget_lock;
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ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 13:59:42 +00:00
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struct hdac_widget_tree *widgets;
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ALSA: hda - Add regmap support
This patch adds an infrastructure to support regmap-based verb
accesses. Because o the asymmetric nature of HD-audio verbs,
especially the amp verbs, we need to translate the verbs as a sort of
pseudo registers to be mapped uniquely in regmap.
In this patch, a pseudo register is built from the NID, the
AC_VERB_GET_* and 8bit parameters, i.e. almost in the form to be sent
to HD-audio bus but without codec address field. OTOH, for writing,
the same pseudo register is translated to AC_VERB_SET_* automatically.
The AC_VERB_SET_AMP_* verb is re-encoded from the corresponding
AC_VERB_GET_AMP_* verb and parameter at writing.
Some verbs has a single command for read but multiple for writes. A
write for such a verb is split automatically to multiple verbs.
The patch provides also a few handy helper functions. They are
designed to be accessible even without regmap. When no regmap is set
up (e.g. before the codec device instantiation), the direct hardware
access is used. Also, it tries to avoid the unnecessary power-up.
The power up/down sequence is performed only on demand.
The codec driver needs to call snd_hdac_regmap_exit() and
snd_hdac_regmap_exit() at probe and remove if it wants the regmap
access.
There is one flag added to hdac_device. When the flag lazy_cache is
set, regmap helper ignores a write for a suspended device and returns
as if it was actually written. It reduces the hardware access pretty
much, e.g. when adjusting the mixer volume while in idle. This
assumes that the driver will sync the cache later at resume properly,
so use it carefully.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-25 13:42:38 +00:00
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/* regmap */
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struct regmap *regmap;
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ALSA: hda: Manage concurrent reg access more properly
In the commit 8e85def5723e ("ALSA: hda: enable regmap internal
locking"), we re-enabled the regmap lock due to the reported
regression that showed the possible concurrent accesses. It was a
temporary workaround, and there are still a few opened races even
after the revert. In this patch, we cover those still opened windows
with a proper mutex lock and disable the regmap internal lock again.
First off, the patch introduces a new snd_hdac_device.regmap_lock
mutex that is applied for each snd_hdac_regmap_*() call, including
read, write and update helpers. The mutex is applied carefully so
that it won't block the self-power-up procedure in the helper
function. Also, this assures the protection for the accesses without
regmap, too.
The snd_hdac_regmap_update_raw() is refactored to use the standard
regmap_update_bits_check() function instead of the open-code. The
non-regmap case is still open-coded but it's an easy part. The all
read and write operations are in the single mutex protection, so it's
now race-free.
In addition, a couple of new helper functions are added:
snd_hdac_regmap_update_raw_once() and snd_hdac_regmap_sync(). Both
are called from HD-audio legacy driver. The former is to initialize
the given verb bits but only once when it's not initialized yet. Due
to this condition, the function invokes regcache_cache_only(), and
it's now performed inside the regmap_lock (formerly it was racy) too.
The latter function is for simply invoking regcache_sync() inside the
regmap_lock, which is called from the codec resume call path.
Along with that, the HD-audio codec driver code is slightly modified /
simplified to adapt those new functions.
And finally, snd_hdac_regmap_read_raw(), *_write_raw(), etc are
rewritten with the helper macro. It's just for simplification because
the code logic is identical among all those functions.
Tested-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200109090104.26073-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-09 09:01:04 +00:00
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struct mutex regmap_lock;
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2015-02-26 11:29:03 +00:00
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struct snd_array vendor_verbs;
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ALSA: hda - Add regmap support
This patch adds an infrastructure to support regmap-based verb
accesses. Because o the asymmetric nature of HD-audio verbs,
especially the amp verbs, we need to translate the verbs as a sort of
pseudo registers to be mapped uniquely in regmap.
In this patch, a pseudo register is built from the NID, the
AC_VERB_GET_* and 8bit parameters, i.e. almost in the form to be sent
to HD-audio bus but without codec address field. OTOH, for writing,
the same pseudo register is translated to AC_VERB_SET_* automatically.
The AC_VERB_SET_AMP_* verb is re-encoded from the corresponding
AC_VERB_GET_AMP_* verb and parameter at writing.
Some verbs has a single command for read but multiple for writes. A
write for such a verb is split automatically to multiple verbs.
The patch provides also a few handy helper functions. They are
designed to be accessible even without regmap. When no regmap is set
up (e.g. before the codec device instantiation), the direct hardware
access is used. Also, it tries to avoid the unnecessary power-up.
The power up/down sequence is performed only on demand.
The codec driver needs to call snd_hdac_regmap_exit() and
snd_hdac_regmap_exit() at probe and remove if it wants the regmap
access.
There is one flag added to hdac_device. When the flag lazy_cache is
set, regmap helper ignores a write for a suspended device and returns
as if it was actually written. It reduces the hardware access pretty
much, e.g. when adjusting the mixer volume while in idle. This
assumes that the driver will sync the cache later at resume properly,
so use it carefully.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-25 13:42:38 +00:00
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bool lazy_cache:1; /* don't wake up for writes */
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2015-02-26 07:54:56 +00:00
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bool caps_overwriting:1; /* caps overwrite being in process */
|
2015-03-13 14:56:25 +00:00
|
|
|
bool cache_coef:1; /* cache COEF read/write too */
|
2022-07-06 12:02:26 +00:00
|
|
|
unsigned int registered:1; /* codec was registered */
|
2015-02-17 20:46:37 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/* device/driver type used for matching */
|
|
|
|
enum {
|
|
|
|
HDA_DEV_CORE,
|
|
|
|
HDA_DEV_LEGACY,
|
2015-04-17 12:28:57 +00:00
|
|
|
HDA_DEV_ASOC,
|
2015-02-17 20:46:37 +00:00
|
|
|
};
|
|
|
|
|
2018-12-15 20:07:23 +00:00
|
|
|
enum {
|
|
|
|
SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */
|
|
|
|
SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */
|
|
|
|
SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */
|
|
|
|
};
|
|
|
|
|
2015-03-03 09:07:24 +00:00
|
|
|
/* direction */
|
|
|
|
enum {
|
|
|
|
HDA_INPUT, HDA_OUTPUT
|
|
|
|
};
|
|
|
|
|
2015-02-17 20:46:37 +00:00
|
|
|
#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
|
|
|
|
|
2015-03-03 09:07:24 +00:00
|
|
|
int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
|
|
|
|
const char *name, unsigned int addr);
|
|
|
|
void snd_hdac_device_exit(struct hdac_device *dev);
|
ALSA: hda - Add widget sysfs tree
This patch changes the sysfs files assigned to the codec device on the
bus which were formerly identical with hwdep sysfs files. Now it
shows only a few core parameter, vendor_id, subsystem_id, revision_id,
afg, mfg, vendor_name and chip_name.
In addition, now a widget tree is added to the bus device sysfs
directory for showing the widget topology and attributes. It's just a
flat tree consisting of subdirectories named as the widget NID
including various attributes like widget capability bits. The AFG
(usually NID 0x01) is always found there, and it contains always
amp_in_caps, amp_out_caps and power_caps files. Each of these
attributes show a single value. The rest are the widget nodes
belonging to that AFG. Note that the child node might not start from
0x02 but from another value like 0x0a.
Each child node may contain caps, pin_caps, amp_in_caps, amp_out_caps,
power_caps and connections files. The caps (representing the widget
capability bits) always contain a value. The rest may contain
value(s) if the attribute exists on the node. Only connections file
show multiple values while other attributes have zero or one single
value.
An example of ls -R output is like below:
% ls -R /sys/bus/hdaudio/devices/hdaudioC0D0/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/:
01/ 04/ 07/ 0a/ 0d/ 10/ 13/ 16/ 19/ 1c/ 1f/ 22/
02/ 05/ 08/ 0b/ 0e/ 11/ 14/ 17/ 1a/ 1d/ 20/ 23/
03/ 06/ 09/ 0c/ 0f/ 12/ 15/ 18/ 1b/ 1e/ 21/
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/01:
amp_in_caps amp_out_caps power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/02:
amp_in_caps amp_out_caps caps connections pin_caps pin_cfg
power_caps
/sys/bus/hdaudio/devices/hdaudioC0D0/widgets/03:
.....
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-02-24 13:59:42 +00:00
|
|
|
int snd_hdac_device_register(struct hdac_device *codec);
|
|
|
|
void snd_hdac_device_unregister(struct hdac_device *codec);
|
2015-10-01 15:59:43 +00:00
|
|
|
int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
|
2023-01-11 11:30:17 +00:00
|
|
|
int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size);
|
2015-03-03 09:07:24 +00:00
|
|
|
|
2019-07-03 12:35:12 +00:00
|
|
|
int snd_hdac_refresh_widgets(struct hdac_device *codec);
|
2015-03-03 09:07:24 +00:00
|
|
|
|
|
|
|
int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
unsigned int verb, unsigned int parm, unsigned int *res);
|
2015-02-26 12:57:47 +00:00
|
|
|
int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
|
|
|
|
unsigned int *res);
|
2015-03-03 22:29:47 +00:00
|
|
|
int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
int parm);
|
2015-02-26 07:54:56 +00:00
|
|
|
int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
unsigned int parm, unsigned int val);
|
2015-03-03 09:07:24 +00:00
|
|
|
int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
hda_nid_t *conn_list, int max_conns);
|
|
|
|
int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
hda_nid_t *start_id);
|
2023-11-17 12:05:58 +00:00
|
|
|
unsigned int snd_hdac_stream_format_bits(snd_pcm_format_t format, snd_pcm_subformat_t subformat,
|
|
|
|
unsigned int maxbits);
|
|
|
|
unsigned int snd_hdac_stream_format(unsigned int channels, unsigned int bits, unsigned int rate);
|
|
|
|
unsigned int snd_hdac_spdif_stream_format(unsigned int channels, unsigned int bits,
|
|
|
|
unsigned int rate, unsigned short spdif_ctls);
|
2015-04-16 06:19:06 +00:00
|
|
|
int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
|
2023-11-17 12:05:56 +00:00
|
|
|
u32 *ratesp, u64 *formatsp, u32 *subformatsp,
|
|
|
|
unsigned int *bpsp);
|
2015-04-16 06:19:06 +00:00
|
|
|
bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
unsigned int format);
|
2015-03-03 09:07:24 +00:00
|
|
|
|
2015-10-08 08:48:05 +00:00
|
|
|
int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
|
|
|
|
int flags, unsigned int verb, unsigned int parm);
|
|
|
|
int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
|
|
|
|
int flags, unsigned int verb, unsigned int parm);
|
|
|
|
bool snd_hdac_check_power_state(struct hdac_device *hdac,
|
|
|
|
hda_nid_t nid, unsigned int target_state);
|
2018-01-23 17:30:51 +00:00
|
|
|
unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac,
|
|
|
|
hda_nid_t nid, unsigned int target_state);
|
2015-02-26 12:57:47 +00:00
|
|
|
/**
|
|
|
|
* snd_hdac_read_parm - read a codec parameter
|
|
|
|
* @codec: the codec object
|
|
|
|
* @nid: NID to read a parameter
|
|
|
|
* @parm: parameter to read
|
|
|
|
*
|
|
|
|
* Returns -1 for error. If you need to distinguish the error more
|
|
|
|
* strictly, use _snd_hdac_read_parm() directly.
|
|
|
|
*/
|
|
|
|
static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
|
|
|
|
int parm)
|
|
|
|
{
|
|
|
|
unsigned int val;
|
|
|
|
|
|
|
|
return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
|
|
|
|
}
|
|
|
|
|
2015-03-03 09:07:24 +00:00
|
|
|
#ifdef CONFIG_PM
|
2015-07-17 14:27:33 +00:00
|
|
|
int snd_hdac_power_up(struct hdac_device *codec);
|
|
|
|
int snd_hdac_power_down(struct hdac_device *codec);
|
|
|
|
int snd_hdac_power_up_pm(struct hdac_device *codec);
|
|
|
|
int snd_hdac_power_down_pm(struct hdac_device *codec);
|
2016-03-04 10:34:18 +00:00
|
|
|
int snd_hdac_keep_power_up(struct hdac_device *codec);
|
2018-06-27 07:03:51 +00:00
|
|
|
|
|
|
|
/* call this at entering into suspend/resume callbacks in codec driver */
|
|
|
|
static inline void snd_hdac_enter_pm(struct hdac_device *codec)
|
|
|
|
{
|
|
|
|
atomic_inc(&codec->in_pm);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* call this at leaving from suspend/resume callbacks in codec driver */
|
|
|
|
static inline void snd_hdac_leave_pm(struct hdac_device *codec)
|
|
|
|
{
|
|
|
|
atomic_dec(&codec->in_pm);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool snd_hdac_is_in_pm(struct hdac_device *codec)
|
|
|
|
{
|
|
|
|
return atomic_read(&codec->in_pm);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool snd_hdac_is_power_on(struct hdac_device *codec)
|
|
|
|
{
|
|
|
|
return !pm_runtime_suspended(&codec->dev);
|
|
|
|
}
|
2015-03-03 09:07:24 +00:00
|
|
|
#else
|
2015-07-17 14:27:33 +00:00
|
|
|
static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
|
|
|
|
static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
|
|
|
|
static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
|
|
|
|
static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
|
2016-03-04 10:34:18 +00:00
|
|
|
static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
|
2018-06-27 07:03:51 +00:00
|
|
|
static inline void snd_hdac_enter_pm(struct hdac_device *codec) {}
|
|
|
|
static inline void snd_hdac_leave_pm(struct hdac_device *codec) {}
|
2020-05-06 06:17:16 +00:00
|
|
|
static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; }
|
|
|
|
static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; }
|
2015-03-03 09:07:24 +00:00
|
|
|
#endif
|
|
|
|
|
2015-02-17 20:46:37 +00:00
|
|
|
/*
|
|
|
|
* HD-audio codec base driver
|
|
|
|
*/
|
|
|
|
struct hdac_driver {
|
|
|
|
struct device_driver driver;
|
|
|
|
int type;
|
2015-06-03 06:54:31 +00:00
|
|
|
const struct hda_device_id *id_table;
|
2015-02-17 20:46:37 +00:00
|
|
|
int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
|
2015-03-02 22:22:59 +00:00
|
|
|
void (*unsol_event)(struct hdac_device *dev, unsigned int event);
|
2018-06-02 03:53:51 +00:00
|
|
|
|
|
|
|
/* fields used by ext bus APIs */
|
|
|
|
int (*probe)(struct hdac_device *dev);
|
|
|
|
int (*remove)(struct hdac_device *dev);
|
|
|
|
void (*shutdown)(struct hdac_device *dev);
|
2015-02-17 20:46:37 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
|
|
|
|
|
2015-06-03 06:54:31 +00:00
|
|
|
const struct hda_device_id *
|
|
|
|
hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
|
|
|
|
|
2015-03-02 22:22:59 +00:00
|
|
|
/*
|
2015-04-14 10:15:47 +00:00
|
|
|
* Bus verb operators
|
2015-03-02 22:22:59 +00:00
|
|
|
*/
|
|
|
|
struct hdac_bus_ops {
|
|
|
|
/* send a single command */
|
|
|
|
int (*command)(struct hdac_bus *bus, unsigned int cmd);
|
|
|
|
/* get a response from the last command */
|
|
|
|
int (*get_response)(struct hdac_bus *bus, unsigned int addr,
|
|
|
|
unsigned int *res);
|
2021-02-05 18:46:28 +00:00
|
|
|
/* notify of codec link power-up/down */
|
|
|
|
void (*link_power)(struct hdac_device *hdev, bool enable);
|
2015-03-02 22:22:59 +00:00
|
|
|
};
|
|
|
|
|
2018-06-02 03:53:58 +00:00
|
|
|
/*
|
|
|
|
* ops used for ASoC HDA codec drivers
|
|
|
|
*/
|
|
|
|
struct hdac_ext_bus_ops {
|
|
|
|
int (*hdev_attach)(struct hdac_device *hdev);
|
|
|
|
int (*hdev_detach)(struct hdac_device *hdev);
|
|
|
|
};
|
|
|
|
|
2015-03-02 22:22:59 +00:00
|
|
|
#define HDA_UNSOL_QUEUE_SIZE 64
|
2015-04-14 10:15:47 +00:00
|
|
|
#define HDA_MAX_CODECS 8 /* limit by controller side */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* CORB/RIRB
|
|
|
|
*
|
|
|
|
* Each CORB entry is 4byte, RIRB is 8byte
|
|
|
|
*/
|
|
|
|
struct hdac_rb {
|
|
|
|
__le32 *buf; /* virtual address of CORB/RIRB buffer */
|
|
|
|
dma_addr_t addr; /* physical address of CORB/RIRB buffer */
|
|
|
|
unsigned short rp, wp; /* RIRB read/write pointers */
|
|
|
|
int cmds[HDA_MAX_CODECS]; /* number of pending requests */
|
|
|
|
u32 res[HDA_MAX_CODECS]; /* last read value */
|
|
|
|
};
|
2015-03-02 22:22:59 +00:00
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/*
|
|
|
|
* HD-audio bus base driver
|
2016-08-04 10:16:00 +00:00
|
|
|
*
|
|
|
|
* @ppcap: pp capabilities pointer
|
|
|
|
* @spbcap: SPIB capabilities pointer
|
|
|
|
* @mlcap: MultiLink capabilities pointer
|
|
|
|
* @gtscap: gts capabilities pointer
|
|
|
|
* @drsmcap: dma resume capabilities pointer
|
2018-06-02 03:53:50 +00:00
|
|
|
* @num_streams: streams supported
|
|
|
|
* @idx: HDA link index
|
|
|
|
* @hlink_list: link list of HDA links
|
2019-04-10 14:00:54 +00:00
|
|
|
* @lock: lock for link and display power mgmt
|
2018-06-02 03:53:50 +00:00
|
|
|
* @cmd_dma_state: state of cmd DMAs: CORB and RIRB
|
2015-04-14 10:15:47 +00:00
|
|
|
*/
|
2015-03-02 22:22:59 +00:00
|
|
|
struct hdac_bus {
|
|
|
|
struct device *dev;
|
|
|
|
const struct hdac_bus_ops *ops;
|
2018-06-02 03:53:58 +00:00
|
|
|
const struct hdac_ext_bus_ops *ext_ops;
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* h/w resources */
|
|
|
|
unsigned long addr;
|
|
|
|
void __iomem *remap_addr;
|
|
|
|
int irq;
|
2015-03-02 22:22:59 +00:00
|
|
|
|
2016-08-04 10:16:00 +00:00
|
|
|
void __iomem *ppcap;
|
|
|
|
void __iomem *spbcap;
|
|
|
|
void __iomem *mlcap;
|
|
|
|
void __iomem *gtscap;
|
|
|
|
void __iomem *drsmcap;
|
|
|
|
|
2015-03-02 22:22:59 +00:00
|
|
|
/* codec linked list */
|
|
|
|
struct list_head codec_list;
|
|
|
|
unsigned int num_codecs;
|
|
|
|
|
|
|
|
/* link caddr -> codec */
|
|
|
|
struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
|
|
|
|
|
|
|
|
/* unsolicited event queue */
|
|
|
|
u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
|
|
|
|
unsigned int unsol_rp, unsol_wp;
|
|
|
|
struct work_struct unsol_work;
|
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/* bit flags of detected codecs */
|
|
|
|
unsigned long codec_mask;
|
|
|
|
|
2015-03-02 22:22:59 +00:00
|
|
|
/* bit flags of powered codecs */
|
|
|
|
unsigned long codec_powered;
|
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/* CORB/RIRB */
|
|
|
|
struct hdac_rb corb;
|
|
|
|
struct hdac_rb rirb;
|
|
|
|
unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
|
2019-12-10 14:57:27 +00:00
|
|
|
wait_queue_head_t rirb_wq;
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* CORB/RIRB and position buffers */
|
|
|
|
struct snd_dma_buffer rb;
|
|
|
|
struct snd_dma_buffer posbuf;
|
2019-08-07 18:02:31 +00:00
|
|
|
int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* hdac_stream linked list */
|
|
|
|
struct list_head stream_list;
|
|
|
|
|
|
|
|
/* operation state */
|
|
|
|
bool chip_init:1; /* h/w initialized */
|
|
|
|
|
|
|
|
/* behavior flags */
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
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bool aligned_mmio:1; /* aligned MMIO access */
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2015-03-02 22:22:59 +00:00
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bool sync_write:1; /* sync after verb write */
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2015-04-14 10:15:47 +00:00
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bool use_posbuf:1; /* use position buffer */
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bool snoop:1; /* enable snooping */
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bool align_bdle_4k:1; /* BDLE align 4K boundary */
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bool reverse_assign:1; /* assign devices in reverse order */
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bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
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2019-05-26 16:58:34 +00:00
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bool polling_mode:1;
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2019-12-12 19:11:01 +00:00
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bool needs_damn_long_delay:1;
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2023-06-07 09:21:50 +00:00
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bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */
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2023-06-07 09:21:51 +00:00
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bool access_sdnctl_in_dword:1; /* accessing the sdnctl register by dword */
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2024-04-09 08:38:08 +00:00
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bool use_pio_for_commands:1; /* Use PIO instead of CORB for commands */
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2019-05-26 16:58:34 +00:00
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int poll_count;
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2015-04-14 10:15:47 +00:00
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int bdl_pos_adj; /* BDL position adjustment */
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2015-03-02 22:22:59 +00:00
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2020-08-05 09:52:20 +00:00
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/* delay time in us for dma stop */
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unsigned int dma_stop_delay;
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2015-03-02 22:22:59 +00:00
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/* locks */
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2015-04-14 10:15:47 +00:00
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spinlock_t reg_lock;
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2015-03-02 22:22:59 +00:00
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struct mutex cmd_mutex;
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2019-04-10 14:00:54 +00:00
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struct mutex lock;
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2015-05-19 14:29:30 +00:00
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2018-07-11 13:17:22 +00:00
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/* DRM component interface */
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struct drm_audio_component *audio_component;
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2018-12-08 16:31:49 +00:00
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long display_power_status;
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2019-02-13 15:21:09 +00:00
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unsigned long display_power_active;
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2018-06-02 03:53:50 +00:00
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/* parameters required for enhanced capabilities */
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int num_streams;
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int idx;
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2019-04-10 14:00:54 +00:00
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/* link management */
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2018-06-02 03:53:50 +00:00
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struct list_head hlink_list;
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bool cmd_dma_state;
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2020-05-04 08:16:15 +00:00
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/* factor used to derive STRIPE control value */
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unsigned int sdo_limit;
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2015-03-02 22:22:59 +00:00
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};
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int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
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2019-08-07 18:32:08 +00:00
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const struct hdac_bus_ops *ops);
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2015-03-02 22:22:59 +00:00
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void snd_hdac_bus_exit(struct hdac_bus *bus);
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int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
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unsigned int cmd, unsigned int *res);
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2021-02-05 18:46:28 +00:00
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void snd_hdac_codec_link_up(struct hdac_device *codec);
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void snd_hdac_codec_link_down(struct hdac_device *codec);
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2015-03-03 09:07:24 +00:00
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2015-04-14 10:15:47 +00:00
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int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
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int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
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unsigned int *res);
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2016-08-04 10:16:00 +00:00
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int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
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2015-04-14 10:15:47 +00:00
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bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
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void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
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void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
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void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
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void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
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void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
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2018-09-11 21:15:16 +00:00
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int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
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2021-02-05 18:46:28 +00:00
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void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable);
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2015-04-14 10:15:47 +00:00
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void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
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2016-02-23 14:54:47 +00:00
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int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
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2015-04-14 10:15:47 +00:00
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void (*ack)(struct hdac_bus *,
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struct hdac_stream *));
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2015-04-12 12:36:13 +00:00
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int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
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void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
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|
2019-08-07 18:32:08 +00:00
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#ifdef CONFIG_SND_HDA_ALIGNED_MMIO
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unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
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void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
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unsigned int mask);
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
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#define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio
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#else
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#define snd_hdac_aligned_mmio(bus) false
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#define snd_hdac_aligned_read(addr, mask) 0
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#define snd_hdac_aligned_write(val, addr, mask) do {} while (0)
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#endif
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static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr,
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u8 val)
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{
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if (snd_hdac_aligned_mmio(bus))
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snd_hdac_aligned_write(val, addr, 0xff);
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else
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writeb(val, addr);
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}
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static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr,
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u16 val)
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{
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if (snd_hdac_aligned_mmio(bus))
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snd_hdac_aligned_write(val, addr, 0xffff);
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else
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writew(val, addr);
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}
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static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr)
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|
{
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return snd_hdac_aligned_mmio(bus) ?
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snd_hdac_aligned_read(addr, 0xff) : readb(addr);
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}
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static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr)
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|
|
|
{
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|
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|
return snd_hdac_aligned_mmio(bus) ?
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|
|
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snd_hdac_aligned_read(addr, 0xffff) : readw(addr);
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|
}
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|
|
#define snd_hdac_reg_writel(bus, addr, val) writel(val, addr)
|
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|
|
#define snd_hdac_reg_readl(bus, addr) readl(addr)
|
2022-03-11 15:35:28 +00:00
|
|
|
#define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr)
|
|
|
|
#define snd_hdac_reg_readq(bus, addr) readq(addr)
|
2019-08-07 18:32:08 +00:00
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/*
|
|
|
|
* macros for easy use
|
|
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|
*/
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_writeb(chip, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value)
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_readb(chip, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg))
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_writew(chip, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value)
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_readw(chip, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg))
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_writel(chip, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value)
|
2017-03-29 06:27:15 +00:00
|
|
|
#define _snd_hdac_chip_readl(chip, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg))
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* read/write a register, pass without AZX_REG_ prefix */
|
|
|
|
#define snd_hdac_chip_writel(chip, reg, value) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_chip_writew(chip, reg, value) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_chip_writeb(chip, reg, value) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_chip_readl(chip, reg) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_chip_readw(chip, reg) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_chip_readb(chip, reg) \
|
2017-03-29 06:27:15 +00:00
|
|
|
_snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* update a register, pass without AZX_REG_ prefix */
|
|
|
|
#define snd_hdac_chip_updatel(chip, reg, mask, val) \
|
|
|
|
snd_hdac_chip_writel(chip, reg, \
|
|
|
|
(snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
|
|
|
|
#define snd_hdac_chip_updatew(chip, reg, mask, val) \
|
|
|
|
snd_hdac_chip_writew(chip, reg, \
|
|
|
|
(snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
|
|
|
|
#define snd_hdac_chip_updateb(chip, reg, mask, val) \
|
|
|
|
snd_hdac_chip_writeb(chip, reg, \
|
|
|
|
(snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
|
|
|
|
|
2022-10-19 16:21:15 +00:00
|
|
|
/* update register macro */
|
|
|
|
#define snd_hdac_updatel(addr, reg, mask, val) \
|
|
|
|
writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
|
|
|
|
|
|
|
|
#define snd_hdac_updatew(addr, reg, mask, val) \
|
|
|
|
writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg)
|
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/*
|
|
|
|
* HD-audio stream
|
|
|
|
*/
|
|
|
|
struct hdac_stream {
|
|
|
|
struct hdac_bus *bus;
|
|
|
|
struct snd_dma_buffer bdl; /* BDL buffer */
|
|
|
|
__le32 *posbuf; /* position buffer pointer */
|
|
|
|
int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
|
|
|
|
|
|
|
|
unsigned int bufsize; /* size of the play buffer in bytes */
|
|
|
|
unsigned int period_bytes; /* size of the period in bytes */
|
|
|
|
unsigned int frags; /* number for period in the play buffer */
|
|
|
|
unsigned int fifo_size; /* FIFO size */
|
|
|
|
|
|
|
|
void __iomem *sd_addr; /* stream descriptor pointer */
|
|
|
|
|
2022-10-19 16:21:15 +00:00
|
|
|
void __iomem *spib_addr; /* software position in buffers stream pointer */
|
|
|
|
void __iomem *fifo_addr; /* software position Max fifos stream pointer */
|
|
|
|
|
|
|
|
void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */
|
|
|
|
u32 dpib; /* DMA position in buffer */
|
|
|
|
u32 lpib; /* Linear position in buffer */
|
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
u32 sd_int_sta_mask; /* stream int status mask */
|
|
|
|
|
|
|
|
/* pcm support */
|
|
|
|
struct snd_pcm_substream *substream; /* assigned substream,
|
|
|
|
* set in PCM open
|
|
|
|
*/
|
2020-02-18 14:39:18 +00:00
|
|
|
struct snd_compr_stream *cstream;
|
2015-04-14 10:15:47 +00:00
|
|
|
unsigned int format_val; /* format value to be set in the
|
|
|
|
* controller and the codec
|
|
|
|
*/
|
|
|
|
unsigned char stream_tag; /* assigned stream */
|
|
|
|
unsigned char index; /* stream index */
|
|
|
|
int assigned_key; /* last device# key assigned to */
|
|
|
|
|
|
|
|
bool opened:1;
|
|
|
|
bool running:1;
|
2015-04-17 11:34:30 +00:00
|
|
|
bool prepared:1;
|
2015-04-14 10:15:47 +00:00
|
|
|
bool no_period_wakeup:1;
|
2015-04-14 10:53:28 +00:00
|
|
|
bool locked:1;
|
2019-12-02 07:49:47 +00:00
|
|
|
bool stripe:1; /* apply stripe control */
|
2015-04-14 10:15:47 +00:00
|
|
|
|
2020-02-18 14:39:18 +00:00
|
|
|
u64 curr_pos;
|
2015-04-14 10:15:47 +00:00
|
|
|
/* timestamp */
|
|
|
|
unsigned long start_wallclk; /* start + minimum wallclk */
|
|
|
|
unsigned long period_wallclk; /* wallclk for period */
|
|
|
|
struct timecounter tc;
|
|
|
|
struct cyclecounter cc;
|
|
|
|
int delay_negative_threshold;
|
|
|
|
|
|
|
|
struct list_head list;
|
2015-04-14 10:53:28 +00:00
|
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
|
|
/* DSP access mutex */
|
|
|
|
struct mutex dsp_mutex;
|
|
|
|
#endif
|
2015-04-14 10:15:47 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
|
|
|
|
int idx, int direction, int tag);
|
|
|
|
struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
|
|
|
|
struct snd_pcm_substream *substream);
|
2022-09-19 12:10:40 +00:00
|
|
|
void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
|
2015-04-14 10:15:47 +00:00
|
|
|
void snd_hdac_stream_release(struct hdac_stream *azx_dev);
|
2015-08-23 06:22:51 +00:00
|
|
|
struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
|
|
|
|
int dir, int stream_tag);
|
2015-04-14 10:15:47 +00:00
|
|
|
|
2023-10-06 10:28:57 +00:00
|
|
|
int snd_hdac_stream_setup(struct hdac_stream *azx_dev, bool code_loading);
|
2015-04-14 10:15:47 +00:00
|
|
|
void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
|
|
|
|
int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
|
2015-04-17 12:28:58 +00:00
|
|
|
int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
|
|
|
|
unsigned int format_val);
|
2023-02-09 12:17:23 +00:00
|
|
|
void snd_hdac_stream_start(struct hdac_stream *azx_dev);
|
2015-04-14 10:15:47 +00:00
|
|
|
void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
|
2022-09-19 12:10:38 +00:00
|
|
|
void snd_hdac_stop_streams(struct hdac_bus *bus);
|
2021-12-16 23:11:27 +00:00
|
|
|
void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
|
2015-04-14 10:15:47 +00:00
|
|
|
void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
|
|
|
|
void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
|
|
|
|
unsigned int streams, unsigned int reg);
|
|
|
|
void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
|
|
|
|
unsigned int streams);
|
|
|
|
void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
|
2024-10-02 08:13:06 +00:00
|
|
|
unsigned int streams, bool start);
|
2019-01-14 18:21:09 +00:00
|
|
|
int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
|
|
|
|
struct snd_pcm_substream *substream);
|
|
|
|
|
2022-10-19 16:21:15 +00:00
|
|
|
void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
|
|
|
|
bool enable, int index);
|
|
|
|
int snd_hdac_stream_set_spib(struct hdac_bus *bus,
|
|
|
|
struct hdac_stream *azx_dev, u32 value);
|
|
|
|
int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
|
|
|
|
struct hdac_stream *azx_dev);
|
|
|
|
void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
|
|
|
|
bool enable, int index);
|
2022-10-27 12:46:56 +00:00
|
|
|
int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);
|
2022-10-19 16:21:15 +00:00
|
|
|
int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
|
|
|
|
struct hdac_stream *azx_dev, u32 value);
|
|
|
|
int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value);
|
|
|
|
|
2015-04-14 10:15:47 +00:00
|
|
|
/*
|
|
|
|
* macros for easy use
|
|
|
|
*/
|
|
|
|
/* read/write a register, pass without AZX_REG_ prefix */
|
|
|
|
#define snd_hdac_stream_writel(dev, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_stream_writew(dev, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_stream_writeb(dev, reg, value) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_stream_readl(dev, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_stream_readw(dev, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
#define snd_hdac_stream_readb(dev, reg) \
|
ALSA: hda: Apply aligned MMIO access only conditionally
It turned out that the recent simplification of HD-audio bus access
helpers caused a regression on the virtual HD-audio device on QEMU
with ARM platforms. The driver got a CORB/RIRB timeout and couldn't
probe any codecs.
The essential difference that caused a problem was the enforced
aligned MMIO accesses by simplification. Since snd-hda-tegra driver
is enabled on ARM, it enables CONFIG_SND_HDA_ALIGNED_MMIO, which makes
the all HD-audio drivers using the aligned MMIO accesses. While this
is mandatory for snd-hda-tegra, it seems that snd-hda-intel on ARM
gets broken by this access pattern.
For addressing the regression, this patch introduces a new flag,
aligned_mmio, to hdac_bus object, and applies the aligned MMIO only
when this flag is set. This change affects only platforms with
CONFIG_SND_HDA_ALIGNED_MMIO set, i.e. mostly only for ARM platforms.
Unfortunately the patch became a big bigger than it should be, just
because the former calls didn't take hdac_bus object in the argument,
hence we had to extend the call patterns.
Fixes: 19abfefd4c76 ("ALSA: hda: Direct MMIO accesses")
BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1161152
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200120104127.28985-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-01-20 10:41:27 +00:00
|
|
|
snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2022-08-18 14:15:14 +00:00
|
|
|
#define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
|
2022-10-07 08:48:56 +00:00
|
|
|
read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \
|
|
|
|
false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2023-09-26 08:06:20 +00:00
|
|
|
#define snd_hdac_stream_readw_poll(dev, reg, val, cond, delay_us, timeout_us) \
|
|
|
|
read_poll_timeout_atomic(snd_hdac_reg_readw, val, cond, delay_us, timeout_us, \
|
|
|
|
false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2022-08-18 14:15:14 +00:00
|
|
|
#define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
|
2022-10-07 08:48:56 +00:00
|
|
|
read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \
|
|
|
|
false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
|
2015-04-14 10:15:47 +00:00
|
|
|
|
|
|
|
/* update a register, pass without AZX_REG_ prefix */
|
|
|
|
#define snd_hdac_stream_updatel(dev, reg, mask, val) \
|
|
|
|
snd_hdac_stream_writel(dev, reg, \
|
|
|
|
(snd_hdac_stream_readl(dev, reg) & \
|
|
|
|
~(mask)) | (val))
|
|
|
|
#define snd_hdac_stream_updatew(dev, reg, mask, val) \
|
|
|
|
snd_hdac_stream_writew(dev, reg, \
|
|
|
|
(snd_hdac_stream_readw(dev, reg) & \
|
|
|
|
~(mask)) | (val))
|
|
|
|
#define snd_hdac_stream_updateb(dev, reg, mask, val) \
|
|
|
|
snd_hdac_stream_writeb(dev, reg, \
|
|
|
|
(snd_hdac_stream_readb(dev, reg) & \
|
|
|
|
~(mask)) | (val))
|
|
|
|
|
2015-04-14 10:53:28 +00:00
|
|
|
#ifdef CONFIG_SND_HDA_DSP_LOADER
|
|
|
|
/* DSP lock helpers */
|
|
|
|
#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
|
|
|
|
#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
|
|
|
|
#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
|
|
|
|
#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
|
|
|
|
/* DSP loader helpers */
|
|
|
|
int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
|
|
|
|
unsigned int byte_size, struct snd_dma_buffer *bufp);
|
|
|
|
void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
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void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
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struct snd_dma_buffer *dmab);
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#else /* CONFIG_SND_HDA_DSP_LOADER */
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#define snd_hdac_dsp_lock_init(dev) do {} while (0)
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#define snd_hdac_dsp_lock(dev) do {} while (0)
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#define snd_hdac_dsp_unlock(dev) do {} while (0)
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#define snd_hdac_stream_is_locked(dev) 0
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static inline int
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snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
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unsigned int byte_size, struct snd_dma_buffer *bufp)
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{
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return 0;
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}
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static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
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{
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}
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static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
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struct snd_dma_buffer *dmab)
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{
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}
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#endif /* CONFIG_SND_HDA_DSP_LOADER */
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2015-03-03 16:33:10 +00:00
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/*
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* generic array helpers
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|
*/
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void *snd_array_new(struct snd_array *array);
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void snd_array_free(struct snd_array *array);
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|
|
static inline void snd_array_init(struct snd_array *array, unsigned int size,
|
|
|
|
unsigned int align)
|
|
|
|
{
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|
|
|
array->elem_size = size;
|
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|
|
array->alloc_align = align;
|
|
|
|
}
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|
static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
|
|
|
|
{
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|
|
|
return array->list + idx * array->elem_size;
|
|
|
|
}
|
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|
|
|
|
static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
|
|
|
|
{
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|
|
|
return (unsigned long)(ptr - array->list) / array->elem_size;
|
|
|
|
}
|
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|
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|
2018-04-23 15:24:56 +00:00
|
|
|
/* a helper macro to iterate for each snd_array element */
|
|
|
|
#define snd_array_for_each(array, idx, ptr) \
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|
|
for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \
|
|
|
|
(ptr) = snd_array_elem(array, ++(idx)))
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|
2023-07-17 11:45:01 +00:00
|
|
|
/*
|
|
|
|
* Device matching
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define HDA_CONTROLLER_IS_HSW(pci) (pci_match_id((struct pci_device_id []){ \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_0) }, \
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|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_2) }, \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_3) }, \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BDW) }, \
|
|
|
|
{ } \
|
|
|
|
}, pci))
|
|
|
|
|
|
|
|
#define HDA_CONTROLLER_IS_APL(pci) (pci_match_id((struct pci_device_id []){ \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_APL) }, \
|
|
|
|
{ } \
|
|
|
|
}, pci))
|
|
|
|
|
|
|
|
#define HDA_CONTROLLER_IN_GPU(pci) (pci_match_id((struct pci_device_id []){ \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG1) }, \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_0) }, \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_1) }, \
|
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_2) }, \
|
2024-05-06 05:25:31 +00:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BMG) }, \
|
2023-07-17 11:45:01 +00:00
|
|
|
{ } \
|
|
|
|
}, pci) || HDA_CONTROLLER_IS_HSW(pci))
|
|
|
|
|
2015-02-17 20:46:37 +00:00
|
|
|
#endif /* __SOUND_HDAUDIO_H */
|