2017-07-16 20:51:53 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2016 - 2018 Intel Corporation. All rights reserved. */
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2016-05-18 16:15:08 +00:00
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#include <linux/memremap.h>
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#include <linux/module.h>
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#include <linux/pfn_t.h>
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2021-11-15 21:20:57 +00:00
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#include "../nvdimm/pfn.h"
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#include "../nvdimm/nd.h"
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#include "bus.h"
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2016-05-18 16:15:08 +00:00
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2021-11-15 21:20:57 +00:00
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static struct dev_dax *__dax_pmem_probe(struct device *dev)
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2016-05-18 16:15:08 +00:00
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{
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2020-10-13 23:50:29 +00:00
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struct range range;
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2017-07-19 00:49:14 +00:00
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int rc, id, region_id;
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2018-10-29 22:52:42 +00:00
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resource_size_t offset;
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2016-05-18 16:15:08 +00:00
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struct nd_pfn_sb *pfn_sb;
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2020-10-13 23:49:38 +00:00
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struct dev_dax_data data;
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2016-05-18 16:15:08 +00:00
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struct nd_namespace_io *nsio;
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struct dax_region *dax_region;
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2019-06-26 12:27:08 +00:00
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struct dev_pagemap pgmap = { };
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2016-05-18 16:15:08 +00:00
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struct nd_namespace_common *ndns;
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struct nd_dax *nd_dax = to_nd_dax(dev);
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struct nd_pfn *nd_pfn = &nd_dax->nd_pfn;
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2018-11-09 20:43:07 +00:00
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struct nd_region *nd_region = to_nd_region(dev->parent);
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2016-05-18 16:15:08 +00:00
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ndns = nvdimm_namespace_common_probe(dev);
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if (IS_ERR(ndns))
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2017-07-16 20:51:53 +00:00
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return ERR_CAST(ndns);
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2016-05-18 16:15:08 +00:00
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/* parse the 'pfn' info block via ->rw_bytes */
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2019-10-31 10:57:41 +00:00
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rc = devm_namespace_enable(dev, ndns, nd_info_block_reserve());
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2016-10-28 21:34:51 +00:00
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if (rc)
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2017-07-16 20:51:53 +00:00
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return ERR_PTR(rc);
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2018-10-29 22:52:42 +00:00
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rc = nvdimm_setup_pfn(nd_pfn, &pgmap);
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2017-12-29 07:54:05 +00:00
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if (rc)
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2017-07-16 20:51:53 +00:00
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return ERR_PTR(rc);
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2019-10-31 10:57:41 +00:00
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devm_namespace_disable(dev, ndns);
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2016-05-18 16:15:08 +00:00
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2018-10-29 22:52:42 +00:00
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/* reserve the metadata area, device-dax will reserve the data */
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2019-03-18 22:53:37 +00:00
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pfn_sb = nd_pfn->pfn_sb;
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2018-10-29 22:52:42 +00:00
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offset = le64_to_cpu(pfn_sb->dataoff);
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2019-10-31 10:57:41 +00:00
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nsio = to_nd_namespace_io(&ndns->dev);
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2018-10-29 22:52:42 +00:00
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if (!devm_request_mem_region(dev, nsio->res.start, offset,
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libnvdimm: use consistent naming for request_mem_region()
Here is an example /proc/iomem listing for a system with 2 namespaces,
one in "sector" mode and one in "memory" mode:
1fc000000-2fbffffff : Persistent Memory (legacy)
1fc000000-2fbffffff : namespace1.0
340000000-34fffffff : Persistent Memory
340000000-34fffffff : btt0.1
Here is the corresponding ndctl listing:
# ndctl list
[
{
"dev":"namespace1.0",
"mode":"memory",
"size":4294967296,
"blockdev":"pmem1"
},
{
"dev":"namespace0.0",
"mode":"sector",
"size":267091968,
"uuid":"f7594f86-badb-4592-875f-ded577da2eaf",
"sector_size":4096,
"blockdev":"pmem0s"
}
]
Notice that the ndctl listing is purely in terms of namespace devices,
while the iomem listing leaks the internal "btt0.1" implementation
detail. Given that ndctl requires the namespace device name to change
the mode, for example:
# ndctl create-namespace --reconfig=namespace0.0 --mode=raw --force
...use the namespace name in the iomem listing to keep the claiming
device name consistent across different mode settings.
Cc: Vishal Verma <vishal.l.verma@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2016-11-28 19:15:18 +00:00
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dev_name(&ndns->dev))) {
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2019-03-18 22:53:37 +00:00
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dev_warn(dev, "could not reserve metadata\n");
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2017-07-16 20:51:53 +00:00
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return ERR_PTR(-EBUSY);
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2019-03-18 22:53:37 +00:00
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}
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2016-08-25 22:17:14 +00:00
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2017-07-19 00:49:14 +00:00
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rc = sscanf(dev_name(&ndns->dev), "namespace%d.%d", ®ion_id, &id);
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if (rc != 2)
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2017-07-16 20:51:53 +00:00
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return ERR_PTR(-EINVAL);
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2017-07-19 00:49:14 +00:00
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2020-10-13 23:50:29 +00:00
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/* adjust the dax_region range to the start of data */
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range = pgmap.range;
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2020-12-14 13:45:06 +00:00
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range.start += offset;
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2020-10-13 23:50:29 +00:00
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dax_region = alloc_dax_region(dev, region_id, &range,
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2020-10-13 23:50:03 +00:00
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nd_region->target_node, le32_to_cpu(pfn_sb->align),
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IORESOURCE_DAX_STATIC);
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2016-05-18 16:15:08 +00:00
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if (!dax_region)
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2017-07-16 20:51:53 +00:00
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return ERR_PTR(-ENOMEM);
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2016-05-18 16:15:08 +00:00
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2020-10-13 23:49:38 +00:00
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data = (struct dev_dax_data) {
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.dax_region = dax_region,
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.id = id,
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.pgmap = &pgmap,
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2020-10-13 23:50:29 +00:00
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.size = range_len(&range),
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2023-11-07 07:22:43 +00:00
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.memmap_on_memory = false,
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2020-10-13 23:49:38 +00:00
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};
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2016-05-18 16:15:08 +00:00
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2023-06-03 06:14:11 +00:00
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return devm_create_dev_dax(&data);
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2016-05-18 16:15:08 +00:00
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}
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2021-11-15 21:20:57 +00:00
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static int dax_pmem_probe(struct device *dev)
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{
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return PTR_ERR_OR_ZERO(__dax_pmem_probe(dev));
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}
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static struct nd_device_driver dax_pmem_driver = {
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.probe = dax_pmem_probe,
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.drv = {
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.name = "dax_pmem",
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},
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.type = ND_DRIVER_DAX_PMEM,
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};
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static int __init dax_pmem_init(void)
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{
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return nd_driver_register(&dax_pmem_driver);
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}
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module_init(dax_pmem_init);
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static void __exit dax_pmem_exit(void)
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{
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driver_unregister(&dax_pmem_driver.drv);
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}
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module_exit(dax_pmem_exit);
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2016-05-18 16:15:08 +00:00
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2024-06-05 17:49:24 +00:00
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MODULE_DESCRIPTION("PMEM DAX: direct access to persistent memory");
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2016-05-18 16:15:08 +00:00
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Intel Corporation");
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2021-11-15 21:20:57 +00:00
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MODULE_ALIAS_ND_DEVICE(ND_DEVICE_DAX_PMEM);
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