Actually get it working
This commit is contained in:
parent
1b7ef1454e
commit
23c4f42eb4
4
.gitmodules
vendored
4
.gitmodules
vendored
@ -1,3 +1,3 @@
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[submodule "raspi_fw"]
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path = raspi_fw
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[submodule "third-party/raspi-firmware"]
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path = third-party/raspi-firmware
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url = https://github.com/raspberrypi/firmware
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103
Makefile
103
Makefile
@ -1,38 +1,83 @@
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CC := $(PREFIX)gcc
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AS := $(PREFIX)as
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OBJCPY := $(PREFIX)objcopy
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boot.o: src/boot.S
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$(AS) -c src/boot.S -o boot.o
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CC := clang
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OBJCPY := llvm-objcopy
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LD := ld.lld
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kernel.o: src/kernel.c
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$(CC) -ffreestanding -c src/kernel.c -o kernel.o -O2 -Wall -Wextra
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BUILD_DIR = build
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SRC_DIR = src
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os.elf: boot.o kernel.o src/linker.ld
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$(CC) -T src/linker.ld -o os.elf -ffreestanding -O2 -nostdlib boot.o kernel.o -lgcc
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GENERAL_OPTIONS =
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kernel8.img: os.elf
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$(OBJCPY) os.elf -O binary kernel8.img
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CLANGOPS = -Wall -nostdlib -ffreestanding -mgeneral-regs-only -Iinclude -mcpu=cortex-a72+nosimd --target=aarch64-elf
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ASMOPS = $(CLANGOPS)
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COPS = $(CLANGOPS)
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.PHONY: image kernel
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C_FILES = $(wildcard $(SRC_DIR)/*.c)
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ASM_FILES = $(wildcard $(SRC_DIR)/*.S)
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OBJ_FILES = $(C_FILES:$(SRC_DIR)/%.c=$(BUILD_DIR)/%_c.o)
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OBJ_FILES += $(ASM_FILES:$(SRC_DIR)/%.S=$(BUILD_DIR)/%_s.o)
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image: kernel8.img
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ifndef VERBOSE
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VERB := @
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endif
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kernel: os.elf
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$(BUILD_DIR)/%_c.o: $(SRC_DIR)/%.c
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$(VERB) echo Compiling $<
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$(VERB) mkdir -p $(@D)
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$(VERB) $(CC) $(COPS) -MMD -c $< -o $@
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real_hardware: kernel8.img
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mkdir -p staging
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cp -v raspi_fw/boot/bcm2710-rpi-3-b.dtb staging
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cp -v raspi_fw/boot/bcm2710-rpi-3-b-plus.dtb staging
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cp -v raspi_fw/boot/bcm2710-rpi-cm3.dtb staging
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cp -v raspi_fw/boot/bcm2711-rpi-4-b.dtb staging
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cp -v raspi_fw/boot/bcm2711-rpi-400.dtb staging
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cp -v raspi_fw/boot/bcm2711-rpi-cm4.dtb staging
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cp -v raspi_fw/boot/bcm2711-rpi-cm4s.dtb staging
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cp -v raspi_fw/boot/*.dat staging
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cp -v raspi_fw/boot/*.elf staging
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cp -v raspi_fw/boot/bootcode.bin staging
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cp -v kernel8.img staging
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$(BUILD_DIR)/%_s.o: $(SRC_DIR)/%.S
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$(VERB) echo Compiling $<
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$(VERB) mkdir -p $(@D)
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$(VERB) $(CC) $(ASMOPS) -MMD -c $< -o $@
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$(BUILD_DIR)/kernel8.elf: $(SRC_DIR)/linker.ld $(OBJ_FILES)
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$(VERB) echo Linking kernel8.elf
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$(VERB) $(LD) -T $(SRC_DIR)/linker.ld -o $(BUILD_DIR)/kernel8.elf $(OBJ_FILES)
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$(BUILD_DIR)/kernel8.img: $(BUILD_DIR)/kernel8.elf
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$(VERB) echo Building kernel8.img
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$(VERB) $(OBJCPY) $(BUILD_DIR)/kernel8.elf -O binary $(BUILD_DIR)/kernel8.img
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.PHONY: image kernel real_hardware
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flat: $(BUILD_DIR)/kernel8.img
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kernel: $(BUILD_DIR)/kernel8.elf
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$(BUILD_DIR)/r4.img: $(BUILD_DIR)/kernel8.img src/config.txt third-party/raspi-firmware/boot/*
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$(VERB) echo Building the image
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$(VERB) echo -- Making the image file \($(BUILD_DIR)/tmp.img\)
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$(VERB) dd if=/dev/zero of=$(BUILD_DIR)/tmp.img count=64 bs=1M
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$(VERB) echo -e "unit: sectors\n/dev/hdc1 : Id=0c" | sfdisk $(BUILD_DIR)/tmp.img > /dev/null
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$(VERB) mkfs.vfat -F 32 $(BUILD_DIR)/tmp.img > /dev/null
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$(VERB) echo -- Copying files to `$(BUILD_DIR)/staging`
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$(VERB) mkdir -p $(BUILD_DIR)/staging
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$(VERB) cp third-party/raspi-firmware/boot/bcm2710-rpi-3-b.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2710-rpi-3-b-plus.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2710-rpi-cm3.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2711-rpi-4-b.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2711-rpi-400.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2711-rpi-cm4.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bcm2711-rpi-cm4s.dtb $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/*.dat $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/*.elf $(BUILD_DIR)/staging/
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$(VERB) cp third-party/raspi-firmware/boot/bootcode.bin $(BUILD_DIR)/staging/
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$(VERB) cp src/config.txt $(BUILD_DIR)/staging/
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$(VERB) cp $(BUILD_DIR)/kernel8.img $(BUILD_DIR)/staging/kernel8.img
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$(VERB) echo -- Gzipping the kernel
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$(VERB) gzip $(BUILD_DIR)/staging/kernel8.img
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$(VERB) mv $(BUILD_DIR)/staging/kernel8.img.gz $(BUILD_DIR)/staging/kernel8.img
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$(VERB) echo -- Copying files into the image
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$(VERB) mcopy -i $(BUILD_DIR)/tmp.img $(BUILD_DIR)/staging/* ::/
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$(VERB) mv $(BUILD_DIR)/tmp.img $(BUILD_DIR)/r4.img
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$(VERB) echo Done!
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real_hardware: $(BUILD_DIR)/r4.img
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clean:
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rm boot.o kernel.o os.elf kernel8.img
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rm -rf staging
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rm -rf $(BUILD_DIR) *.img
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9
include/mini_uart.h
Normal file
9
include/mini_uart.h
Normal file
@ -0,0 +1,9 @@
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#ifndef _MINI_UART_H
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#define _MINI_UART_H
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void uart_init ( void );
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char uart_recv ( void );
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void uart_send ( char c );
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void uart_send_string(char* str);
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#endif /*_MINI_UART_H */
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19
include/mm.h
Normal file
19
include/mm.h
Normal file
@ -0,0 +1,19 @@
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#ifndef _MM_H
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#define _MM_H
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#define PAGE_SHIFT 12
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#define TABLE_SHIFT 9
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#define SECTION_SHIFT (PAGE_SHIFT + TABLE_SHIFT)
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#define PAGE_SIZE (1 << PAGE_SHIFT)
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#define SECTION_SIZE (1 << SECTION_SHIFT)
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#define LOW_MEMORY (2 * SECTION_SIZE)
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#ifndef __ASSEMBLER__
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void memzero(unsigned long src, unsigned long n);
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#endif
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#endif /*_MM_H */
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6
include/peripherals/base.h
Normal file
6
include/peripherals/base.h
Normal file
@ -0,0 +1,6 @@
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#ifndef _P_BASE_H
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#define _P_BASE_H
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#define PBASE 0xFE000000
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#endif /*_P_BASE_H */
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12
include/peripherals/gpio.h
Normal file
12
include/peripherals/gpio.h
Normal file
@ -0,0 +1,12 @@
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#ifndef _P_GPIO_H
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#define _P_GPIO_H
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#include "peripherals/base.h"
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#define GPFSEL1 (PBASE+0x00200004)
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#define GPSET0 (PBASE+0x0020001C)
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#define GPCLR0 (PBASE+0x00200028)
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#define GPPUD (PBASE+0x00200094)
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#define GPPUDCLK0 (PBASE+0x00200098)
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#endif /*_P_GPIO_H */
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19
include/peripherals/mini_uart.h
Normal file
19
include/peripherals/mini_uart.h
Normal file
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#ifndef _P_MINI_UART_H
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#define _P_MINI_UART_H
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#include "peripherals/base.h"
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#define AUX_ENABLES (PBASE+0x00215004)
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#define AUX_MU_IO_REG (PBASE+0x00215040)
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#define AUX_MU_IER_REG (PBASE+0x00215044)
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#define AUX_MU_IIR_REG (PBASE+0x00215048)
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#define AUX_MU_LCR_REG (PBASE+0x0021504C)
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#define AUX_MU_MCR_REG (PBASE+0x00215050)
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#define AUX_MU_LSR_REG (PBASE+0x00215054)
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#define AUX_MU_MSR_REG (PBASE+0x00215058)
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#define AUX_MU_SCRATCH (PBASE+0x0021505C)
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#define AUX_MU_CNTL_REG (PBASE+0x00215060)
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#define AUX_MU_STAT_REG (PBASE+0x00215064)
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#define AUX_MU_BAUD_REG (PBASE+0x00215068)
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#endif /*_P_MINI_UART_H */
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8
include/utils.h
Normal file
8
include/utils.h
Normal file
@ -0,0 +1,8 @@
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#ifndef _BOOT_H
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#define _BOOT_H
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extern void delay ( unsigned long);
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extern void put32 ( unsigned long, unsigned int );
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extern unsigned int get32 ( unsigned long );
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#endif /*_BOOT_H */
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45
src/boot.S
45
src/boot.S
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// AArch64 mode
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// To keep this in the first portion of the binary.
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#include "mm.h"
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.section ".text.boot"
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// Make _start global.
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.globl _start
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// Entry point for the kernel. Registers:
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// x0 -> 32 bit pointer to DTB in memory (primary core only) / 0 (secondary cores)
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// x1 -> 0
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// x2 -> 0
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// x3 -> 0
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// x4 -> 32 bit kernel entry point, _start location
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.global _start
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_start:
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// set stack before our code
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ldr x5, =_start
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mov sp, x5
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mrs x0, mpidr_el1
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and x0, x0,#0xFF // Check processor id
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cbz x0, master // Hang for all non-primary CPU
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b proc_hang
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// clear bss
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ldr x5, =__bss_start
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ldr w6, =__bss_size
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1: cbz w6, 2f
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str xzr, [x5], #8
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sub w6, w6, #1
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cbnz w6, 1b
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proc_hang:
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b proc_hang
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// jump to C code, should not return
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2: bl kernel_main
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// for failsafe, halt this core
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halt:
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wfe
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b halt
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master:
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adr x0, bss_begin
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adr x1, bss_end
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sub x1, x1, x0
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bl memzero
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mov sp, #LOW_MEMORY
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bl kernel_main
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b proc_hang // should never come here
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3
src/config.txt
Normal file
3
src/config.txt
Normal file
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disable_commandline_tags=1
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core_freq_min=500
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48
src/kernel.c
48
src/kernel.c
@ -1,45 +1,11 @@
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#include <stddef.h>
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#include <stdint.h>
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#include "mmio.h"
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#include "uart.h"
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#include "mini_uart.h"
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volatile uint64_t** core_1 = (void*)0xE0;
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volatile uint64_t** core_2 = (void*)0xE8;
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volatile uint64_t** core_3 = (void*)0xF0;
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void _start_core_1(void* addr) {
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*core_1 = (uint64_t*)addr;
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}
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void _start_core_2(void* addr) {
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*core_2 = (uint64_t*)addr;
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}
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void _start_core_3(void* addr) {
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*core_3 = (uint64_t*)addr;
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}
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void kernel_main(uint64_t dtb_ptr32, uint64_t x1, uint64_t x2, uint64_t x3) {
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uint32_t reg;
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char *board;
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asm volatile ("mrs %x0, midr_el1" : "=r" (reg));
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switch ((reg >> 4) & 0xFFF) {
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case 0xD03:
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board = "Raspberry Pi 3\0";
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MMIO_BASE = 0x3F000000;
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break;
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case 0xD08:
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board = "Raspberry Pi 4\0";
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MMIO_BASE = 0xFE000000;
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break;
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}
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void kernel_main(void)
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{
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uart_init();
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uart_puts(board);
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uart_send_string("Hello, world!\r\n");
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return;
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while (1) {
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uart_send(uart_recv() + 1);
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}
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}
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@ -1,44 +1,12 @@
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ENTRY(_start)
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SECTIONS
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{
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/* Starts at LOADER_ADDR. */
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. = 0x80000;
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/* For AArch64, use . = 0x80000; */
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__start = .;
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__text_start = .;
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.text :
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{
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KEEP(*(.text.boot))
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*(.text)
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}
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. = ALIGN(4096); /* align to page size */
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__text_end = .;
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__rodata_start = .;
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.rodata :
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{
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*(.rodata)
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}
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. = ALIGN(4096); /* align to page size */
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__rodata_end = .;
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__data_start = .;
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.data :
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{
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*(.data)
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}
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. = ALIGN(4096); /* align to page size */
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__data_end = .;
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__bss_start = .;
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.bss :
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{
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bss = .;
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*(.bss)
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}
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. = ALIGN(4096); /* align to page size */
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__bss_end = .;
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__bss_size = __bss_end - __bss_start;
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__end = .;
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.text.boot : { *(.text.boot) }
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.text : { *(.text) }
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.rodata : { *(.rodata*) }
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.data : { *(.data) }
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. = ALIGN(0x8);
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bss_begin = .;
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.bss : { *(.bss*) }
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bss_end = .;
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}
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56
src/mini_uart.c
Normal file
56
src/mini_uart.c
Normal file
@ -0,0 +1,56 @@
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#include "utils.h"
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#include "peripherals/mini_uart.h"
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#include "peripherals/gpio.h"
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void uart_send ( char c )
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{
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while(1) {
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if(get32(AUX_MU_LSR_REG)&0x20)
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break;
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}
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put32(AUX_MU_IO_REG,c);
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}
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char uart_recv ( void )
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{
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while(1) {
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if(get32(AUX_MU_LSR_REG)&0x01)
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break;
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}
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return(get32(AUX_MU_IO_REG)&0xFF);
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}
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void uart_send_string(char* str)
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{
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for (int i = 0; str[i] != '\0'; i ++) {
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uart_send((char)str[i]);
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}
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}
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void uart_init ( void )
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{
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unsigned int selector;
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selector = get32(GPFSEL1);
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selector &= ~(7<<12); // clean gpio14
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selector |= 2<<12; // set alt5 for gpio14
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selector &= ~(7<<15); // clean gpio15
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selector |= 2<<15; // set alt5 for gpio15
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put32(GPFSEL1,selector);
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put32(GPPUD,0);
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delay(150);
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put32(GPPUDCLK0,(1<<14)|(1<<15));
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delay(150);
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put32(GPPUDCLK0,0);
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put32(AUX_ENABLES,1); //Enable mini uart (this also enables access to its registers)
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put32(AUX_MU_CNTL_REG,0); //Disable auto flow control and disable receiver and transmitter (for now)
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put32(AUX_MU_IER_REG,0); //Disable receive and transmit interrupts
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put32(AUX_MU_LCR_REG,3); //Enable 8 bit mode
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put32(AUX_MU_MCR_REG,0); //Set RTS line to be always high
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put32(AUX_MU_BAUD_REG,((500000000/(115200*8))-1)); //Set baud rate to 115200
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put32(AUX_MU_IIR_REG,0);
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put32(AUX_MU_CNTL_REG,3); //Finally, enable transmitter and receiver
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}
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6
src/mm.S
Normal file
6
src/mm.S
Normal file
@ -0,0 +1,6 @@
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.globl memzero
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memzero:
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str xzr, [x0], #8
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subs x1, x1, #8
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b.gt memzero
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ret
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15
src/utils.S
Normal file
15
src/utils.S
Normal file
@ -0,0 +1,15 @@
|
||||
.globl put32
|
||||
put32:
|
||||
str w1,[x0]
|
||||
ret
|
||||
|
||||
.globl get32
|
||||
get32:
|
||||
ldr w0,[x0]
|
||||
ret
|
||||
|
||||
.globl delay
|
||||
delay:
|
||||
subs x0, x0, #1
|
||||
bne delay
|
||||
ret
|
||||
0
raspi_fw → third-party/raspi-firmware
vendored
0
raspi_fw → third-party/raspi-firmware
vendored
Loading…
Reference in New Issue
Block a user